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Principal DFT Engineer

Technology, Data & Digital · Software & Web Development · Embedded Systems

In short

Microsoft is seeking a Principal DFT Engineer to lead DFT strategy and execution for chip design projects. The role involves defining DFT architecture, managing ATPG, overseeing post-silicon bring-up, and driving tool development to optimize test quality and productivity for cloud hardware manufacturing. This position requires advanced degrees in engineering and significant technical experience, with a passion for customer-focused solutions in the cloud infrastructure space.

Responsibilities

  • Lead DFT strategy and execution across multiple projects, ensuring alignment with overall chip design goals.
  • Define and implement DFT architecture, including scan insertion, boundary scan, MBIST, and JTAG.
  • Collaborate with RTL, physical design, and verification teams to integrate DFT features seamlessly.
  • Manage ATPG and pattern generation, ensuring high fault coverage and test efficiency.
  • Oversee post-silicon bring-up and debug, including test program development and failure analysis.
  • Drive tool and flow development for DFT automation and optimization.
  • Ensure compliance with manufacturing test requirements, including support for ATE platforms.
  • Mentor and guide DFT engineers, fostering technical growth and best practices.
  • Track project milestones and deliverables, reporting status and risks to leadership.
  • Evaluate emerging DFT methodologies and tools, recommending improvements to enhance test quality and productivity.

Requirements

  • Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years technical engineering experience OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 6+ years technical engineering experience OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 8+ years technical engineering experience OR equivalent experience.
  • Ability to meet Microsoft, customer and/or government security screening requirements.
  • Microsoft Cloud Background Check required.
  • Access to information controlled for export under export control regulations.

Desired Qualifications

  • Experienced debug skills for RTL and gate level simulations.
  • Experience in DFT scan insertion and or Custom Memory BIST design and verification.
  • Experience with Siemens DFT tools.

Benefits

  • The typical base pay range for this role across the U.S. is USD $142,800 - $274,800 per year.
  • In the San Francisco Bay area and New York City metropolitan area, the base pay range for this role is USD $188,000 - $304,200 per year.
  • Certain roles may be eligible for benefits and other compensation.

Skills

scan insertionboundary scanMBISTJTAGATPGRTLgate level simulationsCustom Memory BISTSiemens DFT tools
#Silicon Engineering#Hardware Engineering#DFT
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Company

Microsoft

Job Posted

3 days ago

Employment Type

Full Time

Work mode

Hybrid

Salary

US$142,800–274,800 · Negotiable

Experience Level

Senior

Locations

United States

Qualification

Doctoral, Master, Bachelor

Applicants

Be an early applicant