IP Verification Lead Engineer, Sr

Teknik, data och digitalt · Mjukvaru- och webbutveckling · Mjukvaruutveckling

I korthet

Seeking a Senior IP Verification Lead Engineer with 6+ years of experience in IP level verification. Responsibilities include developing testbenches from scratch, debugging designs using VCS, and ensuring functional/code coverage. Experience with security IPs and bus protocols is preferred.

Ansvarsområden

Develop testbench from scratch.
Debug designs using VCS tool.
Understand and implement testbench environment concepts.
Ensure functional and code coverage.

Krav

Minimum 6+ years of experience in IP level verification.
Proficiency in System Verilog and UVM concepts.
Good understanding of digital and Verilog concepts.
Good understanding of basic bus protocols like AHB/AXI/APB.
Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience.
Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.
PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience.

Önskade kvalifikationer

Preferable to have experience in Security related IP like cryptography and prng and RSA algorithms.
Preferable to have understanding in SiFive RISC processor.
Good to have Formal tool knowledge either VCF or Jasper gold.

Färdigheter

System VerilogUVMVCSVerilogAHBAXIAPB

#IP Verification#Hardware Engineering#System Verilog#UVM#VCS#Digital Design#Cryptography#PRNG#RSA#RISC#AHB#AXI#APB#Functional Coverage#Code Coverage#Formal Verification#JasperGold