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Senior Technical Architect

Technology, Data & Digital · Data, AI & Analytics · Machine Learning · Software Engineering · Data Science

In short

Responsible for the on-device AI execution stack for ARM-based SoCs, focusing on model conversion, quantization, runtime integration, and deployment of AI workloads within power and memory constraints. Requires 8-10 years of software engineering experience with 3+ years in on-device/edge AI deployment, strong C++ and Python skills, and hands-on experience with embedded inference runtimes and quantization techniques.

Responsibilities

  • Deploy and optimize neural network models on NPU, GPU and CPU backends using embedded inference runtimes.
  • Own the model conversion pipeline, including graph capture, operator mapping, quantization, calibration, and accuracy validation.
  • Diagnose and resolve unsupported operators, graph partitioning, and fallback behavior with vendor toolchains.
  • Enable on-device LLM and VLM workloads, optimizing for weight quantization, KV-cache management, and memory footprint.
  • Benchmark and optimize inference latency, throughput, memory bandwidth, and energy consumption.
  • Integrate inference into real-time media and robotics pipelines with zero-copy tensor/buffer sharing.
  • Build model deployment and regression tooling for tracking accuracy and performance.
  • Advise product and data-science teams on model architecture choices for edge accelerators.

Requirements

  • 8–10 years in software engineering, with 3+ years in on-device / edge AI deployment.
  • Strong C++ and Python.
  • Hands-on with embedded inference runtimes (LiteRT/TFLite, ONNX Runtime, ExecuTorch, TVM or vendor NPU SDKs) including delegate/execution-provider integration.
  • Practical quantization expertise (INT8/INT4, per-channel schemes, calibration, accuracy recovery).
  • Familiarity with model formats and conversion tooling across PyTorch/TensorFlow to deployable graphs.
  • Experience profiling on heterogeneous SoCs and understanding memory bandwidth constraints.
  • Understanding of CNN, transformer, and modern vision/language model architectures.

Desired Qualifications

  • On-device LLM/VLM deployment — llama.cpp class runtimes, speculative decoding, paged KV cache.
  • Custom operator or kernel development for DSP/NPU/GPU (OpenCL, Vulkan compute, DSP intrinsics).
  • Compiler-level work — MLIR, TVM, graph-level optimization passes.
  • Vision pipeline integration and camera-to-inference zero-copy paths.
  • MLOps for edge — model versioning, A/B evaluation, field accuracy monitoring.

Benefits

  • Supercharge your potential, find your career, and find your spark at HCLTech.
  • HCLTech is a global technology company with over 230,000 people across 60 countries.
  • Industry-leading capabilities centered around digital, engineering, cloud and AI.
  • Works with clients across all major verticals including Financial Services, Manufacturing, Life Sciences and Healthcare, Technology and Services, Telecom and Media, Retail and CPG, and Public Services.

Skills

C++PythonTensorFlow LiteONNX RuntimeExecuTorchMLIRPyTorchOpenCLVulkan
#AI#ARM#SoC#NPU#GPU#CPU#inference#optimization#LLM#VLM#edge computing#quantization#C++#Python#embedded systems#MLOps
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About HCLTech

Supercharging progress through technology and innovation

HCLTech is a global technology company, home to 219,000+ people across 54 countries, delivering industry-leading capabilities centered around digital, engineering and cloud, powered by a broad portfolio of technology services and products. We work with clients across all major verticals, providing industry solutions for Financial Services, Manufacturing, Life Sciences and Healthcare, Technology and Services, Telecom and Media, Retail and CPG, and Public Services. Consolidated revenues as of 12 months ending September 2022 totaled $12.1 billion. To learn how we can supercharge progress for…

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Company

HCLTech

Job Posted

4 days ago

Employment Type

Full Time

Work mode

On Site

Experience Level

Senior

Locations

Hyderabad, India

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