STA - Lead Engineer

Technology, Data & Digital · Software & Web Development · Software Engineering · Embedded Systems

In short

Perform STA setup, convergence, reviews, and signoff for multi-mode, multi-voltage domain designs. Validate and debug timing across multiple PVT conditions using PrimeTime and Tempus. Develop timing methodologies and automate STA/PD flows using TCL/Perl/Python. Collaborate with cross-functional teams and handle timing ECOs.

Responsibilities

Perform STA setup, convergence, reviews, and signoff for multi-mode, multi-voltage domain designs for SoC & SubSystem
Validate and debug timing across multiple PVT conditions using tools like PrimeTime and Tempus
Run STA flows and correlate Spice to STA results
Evaluate timing methodologies/tools across technology nodes and automate STA/PD flows using TCL/Perl/Python
Work closely with design, DFT, synthesis, technology, CAD and physical implementation teams
Handle timing ECOs (DMSA, tweaker, PrimeClosure) and logical equivalence checks

Requirements

Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience
Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience
PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience
Knowledge of clock gating, power gating, and multi-voltage designs

Desired Qualifications

STA Setup & Signoff
Timing Analysis & Debug
Flow Optimization
Methodology Development
Cross-Functional Collaboration
Low-Power Techniques
ECO Timing Flow

Benefits

Qualcomm is an equal opportunity employer.
Qualcomm is committed to providing an accessible process for individuals with disabilities.
Qualcomm is committed to making our workplace accessible for individuals with disabilities.

Skills

PrimeTimeTempusTCLPerlPython

#STA#SoC#Subsystem#Timing Analysis#Debug#Flow Optimization#Methodology Development#TCL#Perl#Python#Cross-Functional Collaboration#Low-Power Techniques#Clock Gating#Power Gating#Multi-Voltage Designs#ECO Timing Flow#DMSA#PrimeClosure#Logical Equivalence Checks