Senior Technical Architect

Technology, Data & Digital · Software & Web Development · Software Engineering · Embedded Systems

In short

HCLTech is seeking a Senior Technical Architect with 8 to 14 years of experience to join their team in Bangalore, Karnataka. The role involves defining ASIC/SoC verification strategies, developing full chip test plans, and building UVM-based testbenches using SystemVerilog. This position requires expertise in digital logic, processor architectures, and high-speed protocols.

Responsibilities

Define ASIC/SoC verification strategy
Develop full chip testplans
Define full chip TB Architecture
Develop UVM based testbench
Develop C based TB components
Develop test cases, code, execute, and analyze bugs
Implement functional coverage and assertion coding
Analyze code coverage metrics to identify untested gaps
Debug complex simulation failures using waveform viewer tools
Develop SOC C based tests coding & debugging
Perform Gate Level Simulation and netlist debugging
Analyze regression failures and close functional and code coverage
Own and execute verification closure
Automate regression tests and parse log files using scripting languages
Collaborate with hardware design team to resolve bug reports
Document test plans, micro-architecture specifications, and verification results

Requirements

8 to 14 years' experience in ASIC/SoC design and verification
Bachelor's or Master's degree in Electronics & Communication Engineering (ECE), Electrical Engineering (EE), VLSI Design, or a closely related field
Good understanding of ASIC/SoC life cycle
Experience writing ASIC/SoC testplans
Experience in ASIC/SoC Testbench definition
Experience to Build and maintain reusable block-level and sub-system testbenches using SystemVerilog and UVM
Expertise & hands-on experience in OVM/UVM methodologies using SV
Experience to Write, execute, and debug constrained-random and directed test cases based on defined test plans
Experience in developing TB components for SOC with C, SV
Experience in developing TB components, including functional coverage implementation and assertion coding
Experience Set up functional coverage, write system assertions (SVA), and analyze code coverage metrics
Debug complex simulation failures using waveform viewer tools
Experience in SOC C based tests coding & debugging
Experience in Gate level simulation & netlist debugging
Experience in regression failure analysis, Functional and Code Coverage closure
Experience in Utilizing scripting languages like Perl/Shell scripting to automate regression tests and parse large simulation log files
Experience in Collaborating closely with the hardware design team
Experience in Document test plans, micro-architecture specifications, and verification results
Proven industry experience in ASIC/SoC design and verification with multiple successful tape-outs
Mastery of SystemVerilog, Verilog, and UVM
Strong foundational knowledge in digital logic design, finite state machines (FSM), FIFO architectures, and clocking concepts
Strong understanding of CPU/GPU architectures, cache coherency, and memory controllers (e.g., DDR4/DDR5, HBM)
Expert proficiency with industry-leading EDA simulators, debuggers (e.g., Synopsys VCS, Siemens QuestaSim, Cadence Xcelium/Verd), and emulation platforms
Deep, authoritative knowledge of high-speed protocols (e.g., SPI, I2C, PCIe, NVMe, Ethernet, USB) or complex bus architectures (e.g., AMBA AXI/CHI/ACE)
Advanced capability in Python, Tcl, or Perl
Ability to foresee technical risks weeks or months in advance and proactively implement mitigation strategies
Strong leadership and communication skills

Desired Qualifications

Strong understanding of CPU/GPU architectures, cache coherency, and memory controllers (e.g., DDR4/DDR5, HBM) is highly desirable
Ability to foresee technical risks weeks or months in advance and proactively implement mitigation strategies
Strong leadership and communication skills to guide cross-functional teams and align stakeholders on technical directions

Benefits

Consolidated revenues as of 12 months ending June 2026 totaled $14.8 billion
Global technology company with over 223,000 people across 60 countries
Delivering industry-leading capabilities centered around digital, engineering, cloud and AI
Broad portfolio of technology services and products
Work with clients across all major verticals
Providing industry solutions for Financial Services, Manufacturing, Life Sciences and Healthcare, Technology and Services, Telecom and Media, Retail and CPG, and Public Services

Skills

SystemVerilogVerilogUVMOVMCPythonPerlShell scriptingASICSoCAXIPCIeSPII2CEthernetUSBNVMeDDR4DDR5HBM

#ASIC#SoC#verification#SystemVerilog#UVM#testbench#hardware#design

About HCLTech

Supercharging progress through technology and innovation

HCLTech is a global technology company, home to 219,000+ people across 54 countries, delivering industry-leading capabilities centered around digital, engineering and cloud, powered by a broad portfolio of technology services and products. We work with clients across all major verticals, providing industry solutions for Financial Services, Manufacturing, Life Sciences and Healthcare, Technology and Services, Telecom and Media, Retail and CPG, and Public Services. Consolidated revenues as of 12 months ending September 2022 totaled $12.1 billion. To learn how we can supercharge progress for…

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