NOC Design Verification Engineer

Technology, Data & Digital · Software & Web Development · Software Engineering

In short

Qualcomm is seeking a highly skilled Design Verification Engineer in Bangalore, India, to lead the verification of complex AI, Networking, Datacenter, HPC, and Interconnect IPs/Sub-systems. The role requires expertise in SystemVerilog, UVM, and various high-speed protocols, with a focus on independent ownership and driving verification closure.

Responsibilities

Lead verification of complex AI, Networking, Datacenter, HPC, and Interconnect IPs/Sub-systems.
Independently drive verification from architecture understanding through signoff-quality closure.
Build reusable verification environments, UVCs/agents, sequences, scoreboards, checkers, assertions, and coverage infrastructure.
Develop verification plans, execute constrained-random verification, SVA, functional coverage closure, and regression management.
Debug RTL, protocol, architecture, performance, and testbench issues, with root-cause analysis capability.
Verify NoC, coherent/non-coherent interconnects, memory/cache subsystems, AI accelerators, or complex data movement fabrics.
Perform deep protocol verification in PCIe, USB, Ethernet, CXL, or other high-speed serial/networking protocols.
Validate AI Scale-Up / Scale-Out Interconnects such as UAL, UMAC, eSUN, or equivalent.
Understand AMBA protocols (AXI, AHB, ACE, CHI) and coherency architectures.
Conduct performance verification, QoS validation, congestion analysis, scalability testing, and system-level qualification.
Utilize Python, Shell, Perl, or Tcl for regression automation and infrastructure development.
Work with industry-standard simulators, debug tools, coverage tools, CI/CD workflows, emulation, and verification automation frameworks.
Collaborate effectively in a fast-paced environment.

Requirements

Expert in SystemVerilog (SV) and UVM.
Hands-on experience building reusable verification environments, UVCs/agents, sequences, scoreboards, checkers, assertions, and coverage infrastructure.
Strong expertise in verification planning, constrained-random verification, SVA, functional coverage closure, regression management, and signoff methodologies.
Proven ability to independently own and execute IP/Sub-System DV from specification review to verification closure.
Strong debugging skills across RTL, protocol, architecture, performance, and testbench issues.
Experience in verifying NoC, coherent/non-coherent interconnects, memory/cache subsystems, AI accelerators, or complex data movement fabrics.
Deep protocol verification expertise in one or more of: PCIe (Gen4/5/6), USB (USB3.x/USB4), Ethernet (10G/25G/100G/400G+), CXL, or other high-speed serial/networking protocols.
Experience with AI Scale-Up / Scale-Out Interconnects such as UAL, UMAC, eSUN, or equivalent accelerator cluster fabrics.
Strong understanding of AMBA protocols (AXI, AHB, ACE, CHI) and coherency architectures.
Knowledge of performance verification, QoS validation, congestion analysis, scalability testing, and system-level qualification.
Proficiency in Python, Shell, Perl, or Tcl for regression automation, infrastructure development, and productivity enhancement.
Familiarity with industry-standard simulators, debug tools, coverage tools, CI/CD workflows, emulation, and verification automation frameworks.
Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field.
B.Tech/M.Tech in Electronics, Electrical Engineering, Computer Science, VLSI, or related disciplines from reputed Tier-1 institutions (IITs, NITs, IIITs, BITS, or equivalent).
Relevant industry experience aligned with the position level, demonstrating strong expertise in Design Verification, SV/UVM methodologies, protocol verification, and architecture-driven validation.
Proven history of technical ownership and successful delivery of complex IP, Sub-System, or SoC verification programs.

Desired Qualifications

Exposure to SystemC/TLM modeling, performance modeling, emulation/prototyping, and post-silicon correlation.
Track record of delivering first-pass verification closure for complex IPs and subsystems.

Benefits

Qualcomm is an equal opportunity employer.
Qualcomm is committed to providing an accessible process for individuals with disabilities.
Qualcomm is committed to making our workplace accessible for individuals with disabilities.