High Performance DSP core Implementation(Synthesis) Senior Staff/Manager

Technology, Data & Digital · Software & Web Development · Software Engineering · Embedded Systems

In short

Qualcomm is seeking a Senior Staff/Manager for high-performance DSP core implementation, focusing on synthesis and LEC. This role involves defining, optimizing, and verifying IP for next-generation products, requiring extensive experience in physical synthesis, timing constraints, and low-power design methodologies.

Responsibilities

Define, model, design, optimize, verify, validate, implement, and document IP (block/SoC) development for high performance, high quality, low power products.
Collaborate with cross-functional groups to determine product execution path.
Work with leading industry standard tools for Physical Synthesis and Synthesis methodologies.
Write timing constraints for synthesis, STA, timing closure, and pipelining for performance optimization.
Handle timing closure for multi-clock domain designs and MCMM synthesis and optimization.
Implement low-power designs using UPF and power optimization flows like clock gating.
Work independently with design, DFT, and PD teams for netlist delivery and timing constraints validation.
Handle ECOs and formal verification, maintaining high quality metrics.

Requirements

Bachelor's degree in Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration, or related work experience.
OR Master's degree in Science, Engineering, or related field and 5+ years of ASIC design, verification, validation, integration, or related work experience.
OR PhD in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.
12+ years of hands-on experience in Synthesis and LEC.
Strong understanding and in-depth knowledge of Physical Synthesis and Synthesis methodologies with leading industry standard tools.
Proficiency in Python/Tcl.
Familiarity with Synthesis tools (Fusion Compiler/Genus).
Fair knowledge in LEC, LP signoff tools.
Proficient in VLSI front end design steps including Verilog/VHDL, Synthesis, QoR optimization & Equivalence Checking.

Desired Qualifications

Experience with scripting language such as Perl/ Python, TCL.
Experience with different power optimization flows or technique such as clock gating.
Familiarity with standard software engineering practices like Version Control, Configuration Management, Regression is a plus.
Should be sincere, dedicated and willing to take up new challenges.

Benefits

Qualcomm is an equal opportunity employer.
Qualcomm is committed to providing an accessible process for individuals with disabilities.
Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able to participate in the hiring process.
Qualcomm is also committed to making our workplace accessible for individuals with disabilities.