GPU Physical Design Engineer (Senior/Lead)

Technology, Data & Digital · Software & Web Development · Embedded Systems · Software Engineering

In short

Qualcomm's GPU team is looking for experienced Physical Design Engineers in Bangalore, India to lead the implementation and physical signoff of high-performance GPU designs. This role requires close collaboration with various engineering teams to achieve aggressive PPA targets and successful tapeouts, demanding strong expertise in timing convergence and PD tools.

Responsibilities

  • Drive implementation and physical signoff of next-generation high-performance GPU designs.
  • Collaborate with RTL, STA, DFT, Power, and SoC teams to achieve aggressive PPA targets and successful tapeouts.
  • Perform Physical Implementation activities for high performance GPU Core, including Floor-planning, Place and Route, CTS, Formal verification, Physical Verification (DRC/LVS), PDN, Timing Closure and power optimization.
  • Handle technical deliverables with a small team of engineers.

Requirements

  • Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience.
  • OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience.
  • OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.
  • Bachelor's/Master’s degree in Electrical/Electronic Engineering from reputed institution.
  • 3+ years of experience in Physical Design/Implementation.
  • Experience in Physical Design/Implementation of PPA critical Cores and making right PPA trade-off decisions.
  • Strong expertise in timing convergence of high frequency data-path intensive Cores and advanced STA concepts.
  • Well versed with the Block level PnR convergence with Synopsys ICC2/ Cadence Innovus and timing convergence in PTSI/Tempus in latest technology nodes.
  • Good understanding of clocking architecture.
  • Ability to work in close collaboration with design, DFT and PNR teams and resolve issues wrt constraints validation, verification, STA, Physical design, etc.
  • Well versed with Tcl/Perl Scripting.
  • Experience of working as part of a larger team and working towards project milestones and deadlines.
  • Strong problem-solving skills.
  • Good communication skills.

Desired Qualifications

  • Experience of working as part of a larger team and working towards project milestones and deadlines.
  • Handle technical deliverables with a small team of engineers.

Benefits

  • Qualcomm is an equal opportunity employer.
  • Qualcomm is committed to providing an accessible process for individuals with disabilities.
  • Qualcomm is committed to making our workplace accessible for individuals with disabilities.

Skills

ICC2InnovusPTSITempusTclPerl
#GPU#Physical Design#Hardware Engineering#PPA#STA#DRC#LVS#PDN#ICC2#Innovus#PTSI#Tempus#Tcl#Perl
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About Qualcomm

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Enabling a world where everyone and everything can be intelligently connected.\n\n

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Company

Qualcomm

Job Posted

3 weeks ago

Employment Type

Full Time

Work mode

On Site

Experience Level

Senior

Locations

Bangalore, India

Qualification

Bachelor, Master, Doctoral

Applicants

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