Staff Verification Engineer, Compute Subsystems
Teknik, data och digitalt · Mjukvaru- och webbutveckling · Mjukvaruutveckling
I korthet
Qualcomm AI HW team is seeking a Staff Verification Engineer for their Compute Subsystems group in Markham, Ontario. This role involves developing ML HW solutions, creating verification environments using UVM/System Verilog, and ensuring the quality of multimedia and compute subsystems through rigorous testing and analysis. The position requires a Bachelor's degree with 4+ years of relevant experience or equivalent advanced degrees and experience.
Ansvarsområden
- Work closely with design, architects, and verification leads to develop the multimedia and compute subsystem integration verification strategy and test plan.
- Create verification environment using UVM/System Verilog.
- Resolve architecture, design, or verification problems with minimal supervision.
- Write tests and regressions to identify bugs and assist junior team members.
- Develop C reference model.
- Interpret performance check results and identify issues.
- Communicate directly with lead on significant deviations from the Plan of Record.
- Perform RTL code coverage, assertion coverage, functional coverage, and gate level simulations.
- Employ power aware verification techniques for low power design features.
- Identify opportunities for productivity improvements and drive adoption of new verification methodologies.
Krav
- Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.
- OR Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience.
- OR PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
- Thorough understanding of Digital design concepts.
- Strong UVM and System Verilog skills.
- Understanding of Bus protocols like AHB/AXI.
- Perl, python scripting experience.
- Ability to quickly understand Specs and Standards and develop relevant test plans.
- Experience in developing monitors, scoreboards, sequencers and sequences and various aspects of the UVM testbenches.
- Comfortable checking builds, navigating test benches, analyzing coverage, and adding or enabling extra debug.
- Strong communication skills and ability to work well in a team environment.
- 5+ years ASIC design, verification, or related work experience.
Förmåner
- Competitive annual discretionary bonus program.
- Opportunity for annual RSU grants.
- Highly competitive benefits package designed to support your success at work, at home, and at play.
- Reasonable accommodations to support individuals with disabilities to be able to participate in the hiring process.
- Making our workplace accessible for individuals with disabilities.
Färdigheter
System VerilogUVMPerlPythonAXIAHB
#ASIC#Verification#Compute Subsystems#ML HW#Multimedia
Enabling a world where everyone and everything can be intelligently connected.\n\n
Företag
QualcommPublicerade jobb
för 3 veckor sedan
Anställningstyp
Heltid
Arbetsform
På plats
Lön
129 600–179 600 US$ / år
Erfarenhetsnivå
Senior
Platser
Markham, Canada
Kvalifikation
Kandidatexamen
Sökande
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