Sr Staff FAE, RTL to GDS Implementation
Teknik, data och digitalt · Mjukvaru- och webbutveckling · Mjukvaruutveckling · Inbyggda system
I korthet
Ansvarsområden
- Deploy Fusion Compiler and ICC2 on customer designs at advanced nodes (5nm, 3nm, and beyond), solving complex PPA challenges using machine learning placement, physical synthesis, and multi-source CTS techniques.
- Work directly with customers to develop, debug, and optimize RTL to GDS implementation flows, identifying design bottlenecks and tool behavior that blocks timing closure or violates power budgets.
- Run competitive benchmarks to demonstrate Synopsys implementation solutions against rival tools, documenting QoR improvements and building the technical narrative that wins customer evaluations and displaces competition.
- Translate customer findings into clear, actionable requirements for Synopsys R&D, driving tool enhancements that solve both immediate design challenges and long-term methodology gaps across the customer base.
- Lead customer migration to new EDA tool versions by validating flows, identifying regressions, ensuring PPA gains carry through to production designs, and building confidence in adoption.
- Act as the technical bridge between customers and Synopsys R&D, representing customer needs internally with credibility and representing product capabilities externally with authority.
- Proactively identify recurring customer pain points across engagements and develop reusable solutions, scripts, or methodologies that scale beyond a single design or customer and influence product direction.
Krav
- 10+ years of hands-on ASIC design or application engineering experience, with deep expertise in physical implementation including placement, optimization, CTS, and routing.
- Expert-level knowledge of Synopsys backend tools, specifically Fusion Compiler and ICC2, including logical and physical synthesis, timing closure techniques, macro placement, and routing at advanced nodes.
- Strong working knowledge of RTL to GDS full flow, with the ability to debug issues anywhere from synthesis through signoff and articulate root cause to both customers and R&D.
- Demonstrated experience working directly with customers or cross-functional engineering teams to solve complex technical problems under tight schedules and high stakes.
- Deep understanding of advanced node design challenges (5nm and below) and the methodologies required to achieve timing, power, and area targets at scale.
- Bachelor's or Master's in Electrical Engineering, Computer Engineering, or equivalent practical experience.
Önskade kvalifikationer
- Experience with static timing analysis tools like PrimeTime is a strong plus.
- Familiarity with front-end synthesis flows in Design Compiler or Fusion Compiler.
Förmåner
- Comprehensive range of health, wellness, and financial benefits.
- Total rewards include both monetary and non-monetary offerings.
- Consideration for all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.
Färdigheter
Smart, Secure Everything—From Silicon to Software Synopsys technology is at the heart of innovations that are changing the way we live and work. The Internet of Things. Autonomous cars. Wearables. Smart medical devices. Secure financial services. Machine learning and computer vision. These breakthroughs are ushering in the era of Smart, Secure Everything―where devices are getting smarter, everything’s connected, and everything must be secure. Powering this new era of technology are advanced silicon chips, which are made even smarter by the remarkable software that drives them. Synopsys is at…
Företag
Synopsys IncPublicerade jobb
för 4 dagar sedan
Anställningstyp
Heltid
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Erfarenhetsnivå
Senior
Platser
Bengaluru, India
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