Senior Solution Director

Teknik, data och digitalt · Mjukvaru- och webbutveckling · Mjukvaruutveckling · Inbyggda system

I korthet

The Senior Solution Director, acting as a SoC Architect, is responsible for the system-level architecture of a chip, including partitioning, budget allocation, and resolving tradeoffs between product, silicon, and software stakeholders. This role requires a deep understanding of digital design, low-power techniques, memory and interconnect architecture, and physical design constraints, with a minimum of 10 years of experience in SoC/ASIC design.

Ansvarsområden

Own the system-level architecture of the chip, including partitioning into subsystems/IP blocks.
Translate product/market requirements into a system architecture spec: block diagram, subsystem boundaries, interconnect topology, memory hierarchy, and clock/power domain partitioning.
Define interface contracts (protocols, timing, power sequencing) between partitions.
Own top-down and bottom-up budget allocation for area, power, timing, and cost across all blocks.
Run and adjudicate tradeoff studies and make final decisions.
Maintain the architecture 'ledger' tracking budget vs. actual.
Balance competing needs from digital, analog/mixed-signal, DFT, verification, software/firmware, and packaging teams.
Own key architectural decisions: process node selection, IP sourcing, memory/cache hierarchy, interconnect fabric choice, power domain strategy, security architecture, and safety/reliability architecture.
Chair/lead architecture review boards and drive sign-off milestones.
Own the risk register for architectural decisions and drive contingency/mitigation plans.
Serve as the primary technical escalation point for subsystem conflicts.
Interface with product management/marketing to communicate technical tradeoffs in business terms.

Krav

M.S./Ph.D. in EE/CE or equivalent experience.
10+ years in SoC/ASIC design with progressively senior architecture roles.
Demonstrated experience owning full-chip architecture for at least one shipped SoC (or major subsystem architecture on a large-scale SoC).
Strong grasp of digital design, low-power design techniques, memory/interconnect architecture, and physical design constraints.
Proven ability to make and defend high-stakes tradeoff decisions under schedule/cost pressure.
Ability to communicate tradeoffs across technical and business audiences.

Önskade kvalifikationer

Experience across multiple process nodes and multiple end markets (mobile, automotive, data center, edge AI).
Background that spans both hardware and software/firmware architecture.
Experience with formal system-level performance/power modeling tools (e.g., architectural simulators, power estimation frameworks).
20-25+ years of industry experience.

Förmåner

Supercharge your potential at HCLTech.
Find your career and spark.
HCLTech puts its people first.
Global technology company with over 230,000 people across 60 countries.
Industry-leading capabilities in digital, engineering, cloud, and AI.
Work with clients across all major verticals.

Färdigheter

ASIC designDigital designLow-power designMemory architectureInterconnect architecturePhysical designHardware architectureSoftware architectureFirmware architecture

#SoC#Architecture#Chip Design#ASIC#System Architecture#Hardware#Software#Power Management#Performance

Om HCLTech

Supercharging progress through technology and innovation

HCLTech is a global technology company, home to 219,000+ people across 54 countries, delivering industry-leading capabilities centered around digital, engineering and cloud, powered by a broad portfolio of technology services and products. We work with clients across all major verticals, providing industry solutions for Financial Services, Manufacturing, Life Sciences and Healthcare, Technology and Services, Telecom and Media, Retail and CPG, and Public Services. Consolidated revenues as of 12 months ending September 2022 totaled $12.1 billion. To learn how we can supercharge progress for…

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