Physical Design , Principal Engineer/Director, (Custom Silicon Group)
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Qualcomm is looking for a Physical Design Principal Engineer/Director to lead the development of next-generation SoCs within the Custom Silicon Group in Bangalore, India. This role involves managing a team, driving physical design strategy, and ensuring design convergence for high-performance chips from concept to tapeout, requiring extensive experience in advanced technology nodes and signoff methodologies.
Ansvarsområden
- Lead the development and delivery of next-generation, high-performance SoCs from concept to tapeout.
- Drive the complete silicon development lifecycle: architecture, RTL design, integration, physical design, verification, silicon bring-up, and production readiness.
- Provide technical and organizational leadership, and serve as a key customer-facing engineering leader.
- Partner with strategic customers and stakeholders to translate business requirements into successful silicon solutions.
- Lead a team of engineers and collaborate with cross-functional groups across geographies (RTL design, verification, CAD, integration).
- Shape the physical design strategy, ensure design convergence, and maintain signoff integrity across timing, power, and area metrics.
- Execute responsibilities across multiple sites and lead teams across multiple functions.
- Ensure design closure and tapeout expertise in advanced technology nodes.
- Take complete ownership of PnR implementation, including Floor planning, Placement, CTS, and post-route activities.
- Possess mandatory signoff knowledge, including STA, Power Analysis, FV, Low Power Verification and PV.
- Collaborate effectively to resolve issues related to constraints validation, verification, STA, Physical Design and tapeout.
- Understand deep sub-micron design challenges, including leakage power, signal integrity, and DFM.
- Support pre-sales and business development activities by evaluating technical feasibility and providing design expertise.
- Provide technical leadership during design reviews and executive-level customer engagements.
- Drive resolution of customer-reported issues by coordinating across design, verification, firmware, software, and validation teams.
Krav
- Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 8+ years of Hardware Engineering or related work experience.
- OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 7+ years of Hardware Engineering or related work experience.
- OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience.
- Bachelor's or Master’s degree in Electrical/Electronics Engineering and 17- 25 years of Hardware/VLSI Engineering specializing in Physical Design and timing signoff for high-speed SoCs.
Önskade kvalifikationer
- Excellent hands-on experience on Floor planning, PnR and STA flows.
- Good knowledge of Placement/Clock Tree Synthesis (CTS), Low Power/High Performance optimization etc.
- Thorough understanding of signoff domains– LEC/CLP/PDN etc.
- 18+ years of experience with Physical Design and timing signoff expertise in latest tech nodes (e.g., 2nm/3nm/4nm/5nm).
Förmåner
- Qualcomm is an equal opportunity employer.
- Qualcomm is committed to providing an accessible process for individuals with disabilities.
- Qualcomm is committed to making our workplace accessible for individuals with disabilities.
Färdigheter
RTL designSTALow PowerPower AnalysisClock Tree SynthesisFloor planningPnRVLSI
#ASIC Design Manager#Custom Silicon Group#SoCs#hardware engineering#physical design#tapeout#STA#VLSI
Enabling a world where everyone and everything can be intelligently connected.\n\n
Företag
QualcommPublicerade jobb
för 2 veckor sedan
Anställningstyp
Heltid
Arbetsform
På plats
Erfarenhetsnivå
Senior
Platser
Bangalore, India
Kvalifikation
Kandidatexamen, Masterexamen, Doktorand
Sökande
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