FPGA Design & Firmware Engineer, Staff

Teknik, data och digitalt · Mjukvaru- och webbutveckling · Mjukvaruutveckling

I korthet

Qualcomm is seeking an experienced Staff FPGA Design & Firmware Engineer to join their Global CAD team. This role involves designing, implementing, and debugging FPGA RTL and firmware for advanced emulation and prototyping solutions. The engineer will contribute to system architecture, HW/SW partitioning, and technology direction, utilizing industry-standard FPGA technologies and toolchains.

Ansvarsområden

Design, implement, integrate, and debug FPGA RTL and firmware for custom emulation and prototyping platforms.
Develop FPGA solutions using industry-standard AMD/Xilinx and Intel FPGA technologies and toolchains.
Contribute to system architecture, HW/SW partitioning, FPGA architecture, implementation strategy, and system integration.
Work on large and complex FPGA designs involving clock/reset architecture, clock-domain crossings, high-speed interfaces, and timing closure.
Design and integrate high-speed FPGA interfaces, including PCIe, MGT/SerDes and LVDS-based connectivity.
Develop and integrate embedded software and firmware supporting FPGA-based systems.
Contribute to the continuous development and improvement of FPGA tools, technologies, methodologies, automation, and design flows.
Explore and apply AI/ML techniques to FPGA design, verification, debug, and development flows.
Collaborate across hardware, software, CAD, and system engineering teams to debug and resolve complex system-level problems.

Krav

Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field.
5+ years of professional experience in FPGA design, FPGA firmware, RTL development, or related digital hardware development.
Strong hands-on experience with SystemVerilog/Verilog and RTL/HDL design.
Experience with modern FPGA platforms such as AMD/Xilinx UltraScale+, MPSoC, Versal, Intel Stratix, or Agilex.
Experience with FPGA development tools such as AMD Vivado or Intel Quartus.
Strong analytical, debugging, and problem-solving skills.
Excellent interpersonal and communication skills, with the ability to work independently and collaborate effectively across hardware and software teams.
Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.
Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience.
PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.

Önskade kvalifikationer

Master's or PhD in Electrical Engineering, Computer Engineering, Computer Science, Applied Mathematics, or a related technical field.
Experience with clock-domain crossing (CDC), high-speed designs, clock/reset architecture, FPGA implementation, and timing closure techniques.
Hands-on experience with FPGA MGT/SerDes transceivers and LVDS interfaces, including integration, bring-up, and debug.
Strong understanding of digital logic, computer architecture, and VLSI design concepts.
Hands-on programming experience with C++ and Python.
Experience implementing and debugging interfaces and protocols such as AXI, PCIe, Ethernet, I2C, MGT, and LVDS.
Experience designing, integrating, bringing up, and debugging large-scale, rack-based multi-FPGA systems, including system-level architecture and inter-FPGA connectivity.
Experience or strong interest in applying AI/ML technologies to hardware design, verification, EDA/CAD flows, and engineering automation.
Experience with Linux and Embedded Linux.
Experience with modern hardware-description languages or RTL-generation frameworks, such as SpinalHDL, Amaranth, RustHDL, Spade, or similar technologies.
Understanding of ARM-based systems, Linux device drivers, and embedded system architecture.
Understanding of software architecture, design principles, development practices, and design patterns.
Experience with Git, Jira, CI/automation, and collaborative software/firmware development workflows.
Knowledge of Agile development principles and practices.

Förmåner

Competitive annual discretionary bonus program.
Opportunity for annual RSU grants.
Highly competitive benefits package designed to support your success at work, at home, and at play.

Färdigheter

FPGAFirmwareRTLSystemVerilogVerilogAMD/XilinxIntelVivadoQuartusPCIeAXIEthernetMGTSerDesLVDSCDCC++PythonLinuxEmbedded LinuxARMSpinalHDLRustGitJira

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