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Technical Engineering Intern - Design Verification Internship

Technology, Data & Digital · Software & Web Development · Software Engineering

In short

As a Design Verification Intern at Synopsys in Hanoi, Vietnam, you will support the development of high-quality semiconductor IP and EDA solutions by assisting with the verification of complex digital designs. This role involves developing testcases, running simulations, debugging, and contributing to the enhancement of verification environments, while collaborating with design and verification teams.

Responsibilities

  • Develop and execute testcases using SystemVerilog and UVM methodologies for complex digital designs.
  • Perform constrained-random testing and functional coverage analysis.
  • Run simulations using industry-standard EDA tools, analyze results, and debug design issues.
  • Assist in building and enhancing verification environments and testbenches.
  • Implement verification IP (VIP) for protocols like PCIe, UCIe, DDR, AXI, APB, AHB.
  • Develop functional coverage models and analyze coverage metrics.
  • Collaborate with design, verification, and validation teams to understand product architecture and methodologies.
  • Contribute fresh perspectives and innovative solutions to technical challenges.

Requirements

  • Currently pursuing a degree in Electrical Engineering, Electronics Engineering, Computer Engineering, Computer Science, or related technical discipline.
  • Basic understanding of Digital Design fundamentals (combinational/sequential logic, FSM, clocking, reset).
  • Knowledge of Verilog/SystemVerilog for RTL design and verification.
  • Familiarity with UVM concepts.
  • Understanding of verification techniques (testcase development, constrained-random testing, functional coverage, debugging).
  • Familiarity with Linux/Unix operating environments and simulation tools.
  • Strong analytical and problem-solving skills.
  • Good communication skills (written and verbal).
  • Ability to work independently and in a team-oriented environment.

Desired Qualifications

  • Experience with assertion-based verification (SVA) and coverage-driven verification techniques.
  • Knowledge of scripting languages such as Python, Perl, Shell, or TCL.
  • Familiarity with version control systems like Git.
  • Understanding of industry-standard protocols such as PCIe, UCIe, DDR, AXI, APB, AHB, SPI, I2C, or UART.
  • Experience with FPGA or hardware verification projects.

Benefits

  • Real-world projects and hands-on experience.
  • Opportunities to collaborate with passionate teams globally.
  • Freedom to share ideas, unleash creativity, and explore interests.
  • Work with cutting-edge technology.
  • Shape your career path within an inclusive culture.
  • Six-month program (December 2026 – May 2027).

Skills

SystemVerilogUVMVerilogPythonPerlShellTCLGitPCIeUCIeDDRAXIAPBAHBSPII2CUART
#internship#engineering#design verification#semiconductor#EDA
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About Synopsys Inc

Smart, Secure Everything—From Silicon to Software Synopsys technology is at the heart of innovations that are changing the way we live and work. The Internet of Things. Autonomous cars. Wearables. Smart medical devices. Secure financial services. Machine learning and computer vision. These breakthroughs are ushering in the era of Smart, Secure Everything―where devices are getting smarter, everything’s connected, and everything must be secure. Powering this new era of technology are advanced silicon chips, which are made even smarter by the remarkable software that drives them. Synopsys is at…

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Company

Synopsys Inc

Job Posted

7 hours ago

Expires

in 6 months

Employment Type

Internship

Work mode

On Site

Experience Level

Entry

Locations

Hanoi, Vietnam

Qualification

Bachelor

Applicants

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