Physical Design Engineer

Construction, Engineering & Trades · Civil & Industrial Engineering · Electrical Engineering

In short

Qualcomm is seeking a Physical Design Engineer in Bangalore, India. This role involves PNR implementation for Qualcomm SoC's, including floorplanning, placement, CTS, and post-route optimization on the latest technology nodes. A Bachelor's degree and 2+ years of relevant experience are required.

Responsibilities

Complete ownership on PNR implementation (Floorplanning, Placement, CTS, post_route,etc) on latest nodes.
Signoff knowledge is mandatory (STA,Power analysis,FV, low power verification, PV,etc).
Quick learner with good analytical and problem-solving skills.

Requirements

Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field.
2+ years Hardware Engineering experience or related work experience.
2+ years' experience with PNR flow in latest tech nodes (e.g., 4nm/5nm/7nm/10nm).
Good hands-on experience on Floorplanning, PNR and STA flows.
Good knowledge on Placement/Clock Tree Synthesis (CTS), optimization, etc.
Good understanding on signoff domains– LEC/CLP/PDN knowledge, etc.
Good knowledge on Unix/Linux – Perl/TCL fundamentals/scripting.

Desired Qualifications

Ability to plan, design, optimize, verify, and test electronic systems, circuits, and/or mechanical systems.
Experience with bring-up yield, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems is a plus.
Ability to collaborate with cross-functional teams to develop solutions and meet performance requirements.