Layout Design, Staff Engineer

Technology, Data & Digital · Software & Web Development · Software Engineering · Embedded Systems

In short

Synopsys is looking for a Staff Engineer with extensive custom memory layout design experience. The role involves designing and verifying memory IP blocks, driving technology node migrations, and developing layout methodologies using tools like Cadence Virtuoso. This position requires a Bachelor's or Master's degree and 8-10 years of relevant experience.

Responsibilities

Design and own custom layouts for SRAM, Register Files, ROM, and related memory compiler IP blocks from floorplan through final signoff.
Execute and close DRC, LVS, ERC, antenna, density, and reliability checks using Virtuoso and physical verification tools.
Drive technology node migrations for memory compilers, resolving layout and verification issues that emerge with new process rules.
Collaborate directly with circuit designers to ensure schematic-layout correlation, device matching, symmetry, and design intent are preserved.
Develop and refine layout methodologies, automation scripts in Tcl, Perl, or Python, and best practices that improve team efficiency and design quality.
Review layouts created by junior engineers, provide technical guidance, and mentor on complex layout challenges.
Support customer-specific memory customization projects, working through optimization requests and delivering production-ready IP.

Requirements

Bachelor's or Master's degree in Electronics, VLSI, Microelectronics, or a related technical field.
8 to 10 years of hands-on experience in custom memory layout design, specifically SRAM, Register Files, ROM, or memory compiler development.
Strong proficiency with custom layout tools such as Cadence Virtuoso or equivalent platforms.
Demonstrated expertise in DRC/LVS closure, device matching and symmetry, and analog/custom layout techniques.
Deep understanding of CMOS layout fundamentals, memory architecture, and FinFET technology nodes.
Experience with parasitic extraction and physical verification flows, and the ability to interpret and act on results.
Familiarity with scripting in Tcl, Perl, or Python for layout automation is a strong plus.

Desired Qualifications

Ability to debug complex LVS mismatches by tracing through netlists, schematics, and layout views independently.
Understanding of when to optimize for area versus prioritizing matching or performance, and ability to explain trade-offs to circuit designers.
Ability to review junior engineer's layouts and provide specific, actionable feedback grounded in potential downstream problems.
Capacity to work across teams with circuit designers, methodology engineers, and CAD without losing sight of project goals and deadlines.
Proactive in staying current on process technology changes and their associated layout challenges.
Takes ownership of projects and delivers milestones with limited supervision, raising issues early.
Ability to translate circuit designer's intent into a layout that works across process corners and manufactures.

Benefits

Comprehensive medical and healthcare plans.
ETO and FTO Programs.
Maternity and paternity leave, parenting resources, adoption and surrogacy assistance.
Purchase Synopsys common stock at a 15% discount, with a 24 month look-back.
Retirement plans that vary by region and country.
Competitive salaries.

Skills

Cadence VirtuosoTclPerlPython

#Engineering#Hardware Engineering#Semiconductor Solutions#Chip Architecture#Circuit Design#Verification#Custom Memory Layout#DRC#LVS#FinFET#SRAM#Register Files#ROM#Memory Compiler IP#Virtuoso#Physical Verification#Technology Node Migration#Tcl#Perl#Python#Scripting#Automation#Methodology#CAD#VLSI#Microelectronics

About Synopsys Inc

Smart, Secure Everything—From Silicon to Software Synopsys technology is at the heart of innovations that are changing the way we live and work. The Internet of Things. Autonomous cars. Wearables. Smart medical devices. Secure financial services. Machine learning and computer vision. These breakthroughs are ushering in the era of Smart, Secure Everything―where devices are getting smarter, everything’s connected, and everything must be secure. Powering this new era of technology are advanced silicon chips, which are made even smarter by the remarkable software that drives them. Synopsys is at…

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