Implementation Timing / STA Design Engineer
Technology, Data & Digital · Software & Web Development · Software Engineering
In short
Qualcomm's SoC Implementation Team is looking for skilled engineers with at least 2 years of experience to focus on timing constraints development, power analysis, STA, and timing closure for premium-tier chips. This role involves collaborating with RTL and physical design teams to achieve timing closure for complex SoC cores.
Responsibilities
- Develop constraints for physical power-aware synthesis, setup for various modes/corners and low-power multi-voltage domain crossings, and signoff with static timing analysis.
- Collaborate closely with RTL design and physical design teams to identify timing requirements and bottlenecks.
- Generate/review, and validate clock domain crossing and design constraints to achieve timing closure of complex SoC cores.
- Review and integrate HM constraints into SoC and ensure correlation between HM and SoC timing.
- Analyze timing across modes and corners, understand concepts like path pessimism and margins.
Requirements
- Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.
- Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience.
- PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
- Proficient with tools such as Primetime, Fishtail/TCM.
- Scripting skills in Tcl, Perl, or Python are also desirable.
Desired Qualifications
- Experience in timing constraints development, power analysis, STA, and timing closure for premium-tier chips.
- Experience in sub-3nm nodes across mobile, AI, and automotive sectors.
Benefits
- Competitive annual discretionary bonus program
- Opportunity for annual RSU grants
- Highly competitive benefits package designed to support your success at work, at home, and at play.
Skills
TclPerlPython
#ASIC Design#Timing Analysis#STA#Power Analysis#SoC#Sub-3nm Nodes#Mobile#AI#Automotive
Enabling a world where everyone and everything can be intelligently connected.\n\n
Company
QualcommJob Posted
4 days ago
Employment Type
Full Time
Work mode
On Site
Salary
US$145,600–218,400 / year
Experience Level
Mid-Senior
Locations
San Diego, United States of America
Applicants
Be an early applicant
Similar Jobs
Nordea
Helsinki, FinlandFX Strategist, Research & Risk Solutions, Nordea Markets
Full Time Be an early applicant Posted 4 days ago
Saab
Göteborg, SwedenData & Machine Learning Engineer
Full Time Be an early applicant Posted 4 days ago
Alfa Laval
Søborg, DenmarkSenior Mechanical Project Engineer – Oils & Fats
Full Time Be an early applicant Posted 4 days ago
Ericsson
Göteborg, SwedenEntry Level: Hardware Developer - Digital Design
Full Time Be an early applicant Posted 4 days ago
Ericsson
Borås, SwedenTest Engineer
Full Time Be an early applicant Posted 4 days ago
Sandvik
Milan, Italy +2 moreAerospace Segment Specialist
€50k/yr Full Time Be an early applicant Posted 4 days ago
