Front-End ASIC Digital Design, Sr. Staff Engineer -18423

Construction, Engineering & Trades · Civil & Industrial Engineering · Electrical Engineering

In short

Synopsys seeks a Sr. Staff Front-End ASIC Digital Design Engineer in Austin, Texas, to drive RTL from specification through design sign-off. Responsibilities include owning RTL blocks for high-performance SoCs, leading synthesis and timing closure, and ensuring design quality before hand-off to physical design.

Responsibilities

Drive front-end sign-off: static timing analysis (STA), lint, CDC/RDC, synthesis, and power efficient design.
Translate architectural specifications and micro-architecture documents into synthesizable RTL (SystemVerilog/Verilog) for blocks and subsystems.
Own timing constraint (SDC) development and review; support full-chip timing closure.
Perform synthesis, QoR analysis, and iterative RTL optimization for area, timing, congestion, and power.
Apply formal property verification (VC Formal) and assertion-based design (SVA) to validate block behavior.
Run power estimation and analysis (PrimePower) and feed findings back into RTL optimization.
Contribute to methodology improvement, scripting, and regression automation.

Requirements

BS/MS in Electrical/Computer Engineering or a related field.
8+ years of experience in ASIC design and STA sign-off.
Demonstrated experience with front-end sign-off flows: STA (PrimeTime), lint (SpyGlass), and CDC/RDC.
Strong proficiency in SystemVerilog/Verilog RTL coding for synthesis.
Solid understanding of synthesis (Design Compiler / Fusion Compiler) and QoR analysis.
Experience with low-power design techniques: clock gating, power gating, multi-Vt, UPF.
Working knowledge of SDC constraint development and timing closure methodology.
Proficiency in scripting: TCL, Python, Perl, and Linux/UNIX environments.
Command of digital design fundamentals: FSMs, arbitration, clock domain crossing, memory interfaces, and standard protocols (AMBA AXI/AHB/APB).
High-speed interface IP integration experience (PCIe, DDR/LPDDR, Ethernet, USB, MIPI).

Desired Qualifications

Your work ships in HPC and AI accelerator silicon deployed at scale in data centers worldwide.
Curious and improvement-minded: You identify an inefficient workflow, which you then automate and turn into a reusable capability for everyone.
Accountable and proactive: You are hands-on and take the lead and responsibility for driving issues to a closure.
A clear communicator: Your specifications, review feedback, and sign-off documentation provide clear guidance for stakeholders.
Highly detail-oriented: You follow quality and sign-off checklists rigorously and prioritize finding issues early in the process than at a later stage.

Benefits

In addition to the base salary, this role may be eligible for an annual bonus, equity, and other discretionary bonuses.
Comprehensive health, wellness, and financial benefits.
Competitive total rewards package.
Comprehensive medical and healthcare plans.
ETO and FTO Programs for time away.
Maternity and paternity leave, parenting resources, adoption and surrogacy assistance.
ESPP: Purchase Synopsys common stock at a 15% discount.
Retirement Plans.

Skills

SystemVerilogVerilogSTALintCDCRDCSynthesisLow-power designUPFSDCTCLPythonPerlLinuxUNIXAXIAHBAPBPCIeDDRLPDDREthernetUSBMIPI

#ASIC#Digital Design#Front-End#Sr. Staff Engineer#RTL#SoC#STA#Lint#CDC#RDC#Synthesis#Timing Closure#Power Efficient Design#SystemVerilog#Verilog#SDC#QoR#Low-Power Design#UPF#Formal Property Verification#SVA#PrimePower#Scripting#TCL#Python#Perl#Linux/UNIX#Digital Design Fundamentals#FSMs#Arbitration#Clock Domain Crossing#Memory Interfaces#AMBA#AXI#AHB#APB#High-Speed Interface IP#PCIe#DDR/LPDDR#Ethernet#USB#MIPI#HPC#AI Accelerators#Data Centers

About Synopsys Inc

Smart, Secure Everything—From Silicon to Software Synopsys technology is at the heart of innovations that are changing the way we live and work. The Internet of Things. Autonomous cars. Wearables. Smart medical devices. Secure financial services. Machine learning and computer vision. These breakthroughs are ushering in the era of Smart, Secure Everything―where devices are getting smarter, everything’s connected, and everything must be secure. Powering this new era of technology are advanced silicon chips, which are made even smarter by the remarkable software that drives them. Synopsys is at…

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