DDR/LPDDR IP Design Sr Staff Engineer
Technology, Data & Digital · Software & Web Development · Software Engineering
In short
Synopsys is seeking a Sr Staff Engineer for DDR/LPDDR IP Design in Wuhan, China. The role involves working on cutting-edge semiconductor solutions, focusing on ASIC design methodology, simulation, and silicon debug. Ideal candidates will have extensive experience with Verilog/System Verilog, strong debugging skills, and familiarity with Synopsys EDA tools.
Responsibilities
- Working as part of a highly experienced DDR/LPDDR design and verification team, targeting current and next generation technology.
- Delivering high-end designs and supporting DDR/LPDDR products.
- Working on digital design based on predefined RTL coding style include Verilog and System Verilog.
- Cleaning RTL check violations in lint, CDC, DFT and synthesis.
- Root causing issues in both simulation and silicon.
- Interacting with different design groups and customer support teams.
- Interacting with Application Engineers for customer support.
Requirements
- BSEE in EE with 9+ years of digital design experience or MSEE with 6+ years of relevant experience.
- Work on digital design based on predefined RTL coding style include Verilog and System Verilog, clean RTL check violations in lint, CDC, DFT and synthesis.
- Solid Debugging skills and ability to root cause issues include both simulation and silicon.
- Good knowledge of SNPS EDA tools like VCS, Verdi, Spyglass, DC, Formality.
- Good communication skills for interacting between different design groups and customer support teams are required.
Desired Qualifications
- Theoretical and practical background in DDR or LPDDR is a solid plus.
- Has strong desire to learn and explore new technologies.
- Demonstrates good analysis and problem-solving skills.
- Knowledge in interface technologies such as DDR, HBM, UCIe is a plus.
- Scripting experience in Shell, Perl, Python and TCL is a plus.
- Knowledge of analogic circuit is a plus.
Benefits
- Comprehensive medical and healthcare plans.
- ETO and FTO Programs (Time Away).
- Maternity and paternity leave, parenting resources, adoption and surrogacy assistance.
- Purchase Synopsys common stock at a 15% discount, with a 24 month look-back (ESPP).
- Retirement Plans.
- Competitive salaries.
- Around the office daily routine.
#ASIC#DDR#LPDDR#IP Design#RTL#Verilog#System Verilog#Simulation#Debug#Lint#CDC#DFT#Synthesis#VCS#Verdi#Spyglass#DC#Formality#Shell#Perl#Python#TCL#Analogic Circuit
Company
Synopsys Inc
Job Posted
1 week ago
Employment Type
Full Time
WorkMode
On Site
Experience Level
Senior
Locations
Wuhan, China
Qualification
Bachelor, Master
Applicants
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