SoC Infrastructure/NoC, Power & Performance Validation Lead, Staff (AI Accelerator Platform)
Technology, Data & Digital · Software & Web Development · Software Engineering · Embedded Systems
In short
Qualcomm is seeking a Staff SoC Infrastructure/NoC, Power & Performance Validation Lead for its AI Accelerator Platform in San Diego. This role involves ensuring end-to-end silicon quality through pre- and post-silicon validation, focusing on content quality, system-level validation enablement, and developing scalable automation frameworks.
The ideal candidate will have extensive experience in digital design, on-chip interconnects, and analyzing SOC bus architecture, performance, and power, with a strong background in embedded systems and programming languages like C, C++, and Python.
Responsibilities
- Develop, validate, and scale system-level test content across HW and SW boundaries.
- Develop thorough performance validation plans, factoring in Performance-Power trade-offs.
- Analyze SOC Bandwidth, QoS, Latency and Throughput.
- Evaluate AI inference and training workloads for optimal throughput, latency, memory bandwidth, and power-performance efficiency.
- Contribute to methodology development for performance characterization, benchmarking, and KPI tracking across product generations.
- Create performance dashboards, reports, and technical reviews.
- Design and implement drivers and test content.
Requirements
- BS or MS or PhD in Electrical Engineering, Computer Engineering, Computer Science, or related field.
- 7+ years of experience in silicon validation, or platform bring-up.
- Expertise in Interconnect architectures - NoCs, AXI, AHB etc.
- Ability to write programs to stress interconnect transactions for appropriate coverage.
- Solid expertise in various FIFO designs and related performance/functionality aspects.
- Thorough understanding of Memory hierarchy and caches - coherency, consistency (ordering), memory types and attributes, synchronization & semaphores, full-system concurrency, MTE, MPAM.
- Thorough understanding of CPU and DDR concepts, Multimedia, GPU, Peripherals.
- Knowledge of System low power modes, Dynamic clock and voltage scaling operations, Interrupt architecture.
- Experience with Debug architecture - interactions with JTAG based debuggers, state dump scripts.
- In-depth debugging experience for Complex HW and SW issues.
- Experience working with Perfmon architecture - performance counters, telemetry data, and hardware/software co-optimization.
- Drive correlation between pre-silicon models, emulation platforms, and silicon performance measurements.
- Experience in embedded systems/expertise in C, C++, Python and assembly languages.
- Logical thinking and problem-solving ability with focus on Power, Performance and SoC System feature validation.
- Fundamental understanding of Static, Leakage and Dynamic power in a semiconductor design.
- Familiarity in debug tools including JTAG and kernel debuggers.
Desired Qualifications
- Strong understanding of computer architecture, AI/ML accelerators, memory hierarchy, cache coherency, and on-chip interconnects.
- Knowledge of AI/ML workloads, tensor operations, matrix multiplication, transformer models, and large-scale inference systems.
- Familiarity with System level debug, silicon bring-up.
Benefits
- Competitive annual discretionary bonus program.
- Opportunity for annual RSU grants.
- Highly competitive benefits package designed to support your success at work, at home, and at play.
Skills
AXIAHBCC++PythonJTAG
#SoC#AI Accelerator#Power#Performance#Validation#Emulation#ASIC#Hardware#Software
Enabling a world where everyone and everything can be intelligently connected.\n\n
Company
QualcommJob Posted
2 weeks ago
Employment Type
Full Time
Work mode
On Site
Salary
US$145,600–218,400 / year
Experience Level
Senior
Locations
San Diego, United States of America
Qualification
Bachelor, Master, Doctoral
Applicants
Be an early applicant
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