Senior DFX Engineer

Technology, Data & Digital · Software & Web Development · Software Engineering

In short

Ericsson is seeking a Senior DFX Engineer in Austin, Texas, to be a technical authority for DFX and Silicon Lifecycle Management across their ASIC programs. The role involves strategizing, designing, and verifying DFX/SLM capabilities, applying AI in engineering workflows, and mentoring junior engineers.

Responsibilities

Strengthen a world-class DFX & SLM group and its role as the technical authority for silicon lifecycle management
Strategize, architect, plan, design/implement & verify DFT and SLM capability across multiple ASIC programs, from chip specification to tape-out sign-off
Extend silicon lifecycle capability in the field: in-system test, silicon telemetry, monitoring, diagnostics, and repair
Partner with Test Team to define overall Test Strategy
Partner with Physical Design teams (IP & SOC) to develop complex SOCs
Work closely with EDA Vendors, ASIC partners & CAD team to define next generation DFT/SLM flows and methodology with latest & greatest features
Apply AI as a first-class tool in daily execution: automating flows, accelerating debug and triage, and extracting insight from silicon and system telemetry
Mentor & coach junior engineers within the team and helping them achieve their goals
Collaborate with cross site / geography teams to help establish great working relationship and deal very efficiently with deliverables across teams

Requirements

5+ years of experience working in SOC/IP/ASIC design team with an emphasis around DFX (DFT/DFD/DFM).
Experience on DFX Verification specifically (Verification of features like: Memory BIST, JTAG, Boundary Scan, In-field Tests, Custom IP Test Interface etc.) would be of great interest for this role.
Minimum Education: BSEE
Must have working knowledge about DFX standards and practices, ATPG, Scan, JTAG, iJTAG, BIST, including trade-offs between test quality, test time, efficiency, and their impact to overall design implementation.
Experience with SOC level DFT planning, architecture, and execution.
Exposure to Silicon Lifecycle Management: in-field/in-system test, telemetry-driven monitoring and diagnostics, and RAS concepts.
Familiarity with IEEE 1149.1, 1687, and 1838 is a plus.
Good focus on automation & infrastructure to enable efficient execution pipeline within DFX function.
Experience applying AI/ML to engineering workflows (debug, triage, data analysis, flow automation), or a demonstrated drive to build it into daily execution.
Experience with post silicon debug, yield bring up, test-time and pattern delivery while working closely with Test & Product Engineering teams for long term strategic improvements.
Continuous drive to improve flows, methodology and architecture for enabling scalability of the overall team in years to come.
Understanding of Physical design implementation flows and methods to enable a smooth integration of DFT in the design with efficient and quality hand offs.

Benefits

Competitive package to help with individual needs and goals.
Opportunity for an annual bonus.
Excellent health benefits including choice of three medical plan options and a dental plan option.
Company credits in an amount equal to the cost that Ericsson pays toward the cost of their medical and dental premiums for themselves and eligible covered dependents.
401(k) Plan with automatic 3% company contribution and up to 4% company match.
Company credits in an amount equal to the cost of basic life insurance and basic accidental death and dismemberment coverage, as well as short-term and long-term disability coverage.
Option to participate in Ericsson’s Stock Purchase Plan.
Minimum of 15 days of accrued vacation.
Up to 3 personal days per year.
11 annual holidays.
8 hours of volunteer time.
80 hours of sick time annually.
Up to 16 weeks of paid maternity leave and 6 weeks of parental or adoption leave at 100% of pay.
Financial wellness programs.
Educational assistance.
Matching gifts.
Recognition programs.

Skills

AIDFXDFTDFMJTAGBoundary ScanMemory BISTIn-field TestsCustom IP Test InterfaceATPGScaniJTAGBISTIEEE 1149.1IEEE 1687IEEE 1838ML

#AI#DFX#DFT#DFM#JTAG#Boundary Scan#Memory BIST#In-field Tests#Custom IP Test Interface#ATPG#Scan#iJTAG#BIST#IEEE 1149.1#IEEE 1687#IEEE 1838#ML#Austin#Texas#United States

About Ericsson

Pioneering technology for connecting billions of people worldwide

Our purpose \nTo create connections that make the unimaginable possible.\n\nOur vision\nA world where limitless connectivity improves lives, redefines business and pioneers a sustainable future.\n\nOur values\nPerseverance, professionalism, respect and integrity.\n\nThe future is a place for purpose & vision – ours are clear, and we invite partners, customers and consumers to join us in our journey. \n\nFor a brighter future. For all. Let's #ImaginePossible

See all open jobs at Ericsson Read more about Ericsson Website