PD Engineer
Technology, Data & Digital · Software & Web Development · Software Engineering
In short
Qualcomm is looking for a PD Engineer in Bangalore, India, to plan, design, optimize, verify, and test electronic systems. This role requires expertise in physical design and timing signoff for high-speed cores, with PPA and PDN targets. The position is open to candidates with a relevant Bachelor's, Master's, or PhD degree and the specified years of experience.
Responsibilities
- Plan, design, optimize, verify, and test electronic systems, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems.
- Lead block level or chip level Physical Design, STA and PDN activities.
- Work independently in the areas of RTL to GDSII implementation.
- Collaborate and resolve issues with constraints validation, verification, STA, Physical design, etc.
- Handle technical deliveries with a small team of engineers.
Requirements
- Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.
- OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience.
- OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field.
- 2 years experience in Physical Design and timing signoff for high speed cores.
- Good exposure to high frequency design convergence for physical design with PPA targets and PDN methodology.
- Masters/Bachelors Degree in Electrical/Electronics science engineering with at least 7+ years of experience in IC design.
- Experience in leading block level or chip level Physical Design, STA and PDN activities.
- Ability to collaborate and resolve issues wrt constraints validation, verification, STA, Physical design, etc.
- Knowledge of low power flow (power gating, power gating, multi-Vt flow, power supply management etc.).
- Circuit level comprehension of time critical paths in the design.
- Understanding of deep sub-micron design problems and solutions (leakage power, signal integrity, DFM etc.).
- Tcl/Perl scripting.
- Strong problem-solving skills.
Desired Qualifications
- Experience in leading block level or chip level Physical Design, STA and PDN activities.
- Work independently in the areas of RTL to GDSII implementation.
- Ability to collaborate and resolve issues wrt constraints validation, verification, STA, Physical design, etc.
- Knowledge of low power flow (power gating, multi-Vt flow, power supply management etc.)
- Circuit level comprehension of time critical paths in the design
- Understanding of deep sub-micron design problems and solutions (leakage power, signal integrity, DFM etc.)
- Tcl/Perl scripting
- Willing to handle technical deliveries with a small team of engineers.
- Strong problem-solving skills.
Benefits
- Qualcomm is committed to providing an accessible process for individuals with disabilities.
- Qualcomm is committed to making our workplace accessible for individuals with disabilities.
Skills
Physical Designtiming signoffPPAPDNRTLGDSIISTAlow power flowTclPerl
#Hardware Engineering#Physical Design#timing signoff#PPA targets#PDN methodology#RTL to GDSII#low power flow#Tcl/Perl scripting#IC design
About Qualcomm
Enabling a world where everyone and everything can be intelligently connected.
Enabling a world where everyone and everything can be intelligently connected.\n\n
Company
QualcommJob Posted
3 weeks ago
Employment Type
Full Time
Work mode
On Site
Experience Level
Senior
Locations
Bangalore, India
Qualification
Bachelor, Master, Doctoral
Applicants
Be an early applicant
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