MSIP Design Verification Engineer
Technology, Data & Digital · Software & Web Development · Software Engineering
In short
Qualcomm's Mixed-Signal IP (MSIP) Design Verification team in Cork, Ireland, is hiring Design Verification Engineers. This role involves verifying mixed-signal PHY IPs like DDR, USB, and PCIe for Snapdragon SoCs using advanced tools and techniques. Responsibilities include SV/UVM-based verification, working closely with design teams, and interacting with various global teams.
Responsibilities
- SV/UVM based Design Verification of SerDes, DDR & PLL Mixed-Signal PHY IP
- Work closely with analog and digital front-end design teams to verify RTL and Analog/Mixed-Signal Designs in next-generation SerDes, DDR & PLL IP
- Interact with architecture, design, physical design, software, test and SoC teams to verify and integrate SerDes, DDR & PLL IP designs into the latest Qualcomm Snapdragon products
Requirements
- Bachelor's degree in Engineering, Computer Science or related field.
- Experience in design and verification of hardware and software on SoCs and SoC/IP Methodologies for verifying complex units using industry standard tools and technologies
- Knowledge in developing unit and SoC/IP level test benches using UVM.
- Constrained random functional verification environment in System Verilog/UVM with excellent debugging skills.
- Experience in Low power verification using UPF at RTL and GLS simulation level.
- Experience in Power Aware Gate Level Simulation (GLS) verification flow with zero delay and SDF annotated simulation.
- Experience of pre and post-silicon verification testflow and automated test benches. Post silicon ATE/PTE vector bringup and bench characterization support.
- Knowledge of test-plan development, coverage (code/functional) analysis, transaction level modelling, constrained random verification, assertion based and formal verification techniques with System Verilog
- Experience with Verilog, SystemVerilog, Assertions, Python/TCL/Perl/shell-scripting.
- Minimum 2+ years design verification, or related work experience.
- Minimum Bachelor's degree in Science, Engineering, or related field.
Desired Qualifications
- Emulation experience is desired along with SV/UVM based simulation.
- Experience in analog mixed signal verification techniques will be a plus.
- Excellent communication skills
Benefits
- Salary, stock and performance related bonus
- Maternity/Paternity Leave
- Employee stock purchase scheme
- Matching pension scheme
- Education Assistance
- Relocation and immigration support (if needed)
- Life, Medical, Income and Travel Insurance
- Subsidised memberships for physical and mental well-being
- Bicycle purchase scheme
- Employee run clubs, including, running, football, chess, badminton + many more
Skills
System VerilogUVMVerilogAssertionsPythonTCLPerlShell ScriptingUPFSDFASIC DesignRTL
#MSIP#Mixed-Signal IP#Design Verification#SerDes#DDR#PLL#SoC#ASIC
Enabling a world where everyone and everything can be intelligently connected.\n\n
Company
QualcommJob Posted
1 day ago
Employment Type
Full Time
Work mode
On Site
Experience Level
Mid-Senior
Locations
Cork, Ireland
Qualification
Bachelor
Applicants
Be an early applicant
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