ASIC Design Engineer – SoC Interconnect, Cache & Memory Systems
Technology, Data & Digital · Software & Web Development · Software Engineering · Embedded Systems
In short
Qualcomm is seeking an ASIC Design Engineer specializing in SoC Interconnect, Cache & Memory Systems. This role involves designing, implementing, and validating complex SoC subsystems. You will collaborate with cross-functional teams to deliver high-performance, power-efficient silicon solutions for next-generation products.
Responsibilities
- Develop microarchitecture definitions and design specifications for complex SoC subsystems.
- Design, implement, and validate RTL for SoC interconnects, cache controllers, memory subsystems, and DDR memory controller components.
- Collaborate with system architects to evaluate hardware feasibility of new features, algorithms, and performance requirements.
- Optimize designs for performance, power, area, timing, and scalability.
- Work closely with verification teams to develop test plans, review coverage, debug issues, and achieve design quality goals.
- Support synthesis, timing closure, power analysis, gate-level simulations, and physical design activities.
- Participate in system-level integration and debugging throughout the product development cycle.
- Investigate and resolve pre-silicon and post-silicon issues.
- Contribute to C/C++ modeling, design methodologies, and process improvements that enhance engineering productivity and design quality.
- Collaborate across cross-functional teams to successfully deliver silicon for production.
Requirements
- Bachelor's, Master's, or PhD in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
- 0-4+ years of industry experience or relevant academic experience in ASIC/SoC design.
- Experience or coursework in: Verilog and/or SystemVerilog RTL design
- Experience or coursework in: Computer Architecture
- Experience or coursework in: ASIC design methodologies
- Experience or coursework in: Digital logic design
- Experience or coursework in: C, C++, and/or Python programming
- Strong analytical and problem-solving skills.
- Excellent communication and collaboration skills.
- Bachelor's degree in Science, Engineering, or related field.
Desired Qualifications
- Experience or knowledge in SoC interconnects and on-chip communication fabrics
- Experience or knowledge in Cache and memory subsystem design
- Experience or knowledge in DDR/LPDDR memory controller architecture and design
- Experience or knowledge in ARM or x86 processor architectures and bus protocols
- Experience or knowledge in RTL development for CPUs, cache controllers, or memory controllers
- Experience or knowledge in Low-power design methodologies
- Experience or knowledge in Functional verification and coverage-driven verification techniques
- Experience or knowledge in Synopsys synthesis tools and ASIC implementation flows
- Experience or knowledge in Timing closure, physical design support, and power optimization
- Experience or knowledge in Silicon bring-up and post-silicon debug
Benefits
- Competitive annual discretionary bonus program
- Opportunity for annual RSU grants
- Highly competitive benefits package designed to support your success at work, at home, and at play
Skills
VerilogSystemVerilogComputer ArchitectureASIC designDigital logic designC++PythonSoC interconnectsCacheMemory subsystemsDDRARMx86
#ASIC#SoC#Design#Engineer#Interconnect#Cache#Memory Systems#Qualcomm
About Qualcomm
Enabling a world where everyone and everything can be intelligently connected.
Enabling a world where everyone and everything can be intelligently connected.\n\n
Company
QualcommJob Posted
3 days ago
Employment Type
Full Time
Work mode
On Site
Salary
US$101,400–152,200 / year
Experience Level
Associate
Locations
San Diego, United States of America
Qualification
Bachelor, Master, Doctoral
Applicants
Be an early applicant
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