Memory IP Design Engineer

Technology, Data & Digital · Software & Web Development · Software Engineering

In short

Synopsys is seeking an early-career Memory IP Design Engineer in Noida, India, to design and simulate embedded memory circuits. This role involves supporting layout, characterization, and debugging, with opportunities to collaborate with global teams and advance in semiconductor design.

Responsibilities

Design and simulate embedded memory circuits including SRAM, ROM, and Register Files using Cadence Virtuoso and related tools.
Support layout activities by working with layout engineers to ensure design intent translates cleanly into physical implementation.
Run bitcell characterization and basic reliability analysis to validate performance across process, voltage, and temperature corners.
Debug circuit-level issues by analyzing simulation results, identifying root causes, and proposing fixes with guidance from senior engineers.
Collaborate with CAD, verification, and frontend teams to align on design requirements, timing constraints, and integration needs.
Characterize the memory compiler for desired PPA.
Use scripting in C-Shell, Perl, or Python to automate repetitive tasks and improve design flow efficiency.

Requirements

Bachelor's or Master's degree in Electrical Engineering, Electronics Engineering, or a related technical field.
0 to 2 years of hands-on experience in CMOS circuit design, specifically with embedded memory such as SRAM, ROM, or Register Files.
Working knowledge of memory architectures, bitcell design, and circuit fundamentals including read/write operations and sense amplifier behavior.
Experience using Cadence Virtuoso or similar tools for schematic capture, simulation, and layout interaction.

Desired Qualifications

Exposure to scripting languages like C-Shell, Perl, or Python is a plus and will help you automate workflows and analyze data more effectively.
You can look at a simulation waveform and spot when something is off, even if you do not immediately know why.
You ask questions when requirements are unclear instead of guessing and moving forward.
You can work on multiple design tasks in parallel without losing track of deadlines or deliverables.
You are comfortable learning new tools and methodologies on the job, and you do not wait for someone to tell you every step.

Benefits

Comprehensive medical and healthcare plans.
ETO and FTO Programs.
Maternity and paternity leave, parenting resources, adoption and surrogacy assistance.
ESPP: Purchase Synopsys common stock at a 15% discount, with a 24 month look-back.
Retirement Plans.
Competitive salaries.

Skills

SRAMROMRegister FilesCadence VirtuosoC-ShellPerlPython

#Memory IP Design#Semiconductor Design#EDA#AI/ML#GenAI#Cloud#Chip Design

About Synopsys Inc

Smart, Secure Everything—From Silicon to Software Synopsys technology is at the heart of innovations that are changing the way we live and work. The Internet of Things. Autonomous cars. Wearables. Smart medical devices. Secure financial services. Machine learning and computer vision. These breakthroughs are ushering in the era of Smart, Secure Everything―where devices are getting smarter, everything’s connected, and everything must be secure. Powering this new era of technology are advanced silicon chips, which are made even smarter by the remarkable software that drives them. Synopsys is at…

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