Layout Design, Sr Staff Engineer

Technology, Data & Digital · Software & Web Development · Software Engineering

In short

Synopsys seeks a Senior Staff Engineer for Layout Design in Noida, India, focusing on creating advanced embedded memory blocks for semiconductors. This role involves full custom layout design, physical verification, and collaboration with circuit teams to meet aggressive performance, power, and area targets.

Responsibilities

Design and own full custom layouts for embedded memory blocks, including SRAM, register files, and ROM compilers across advanced process nodes.
Develop floor plans, place memory cells and periphery blocks, route power grids and signal interconnects to meet area, performance, and power targets.
Run IR drop and electromigration analysis using tools like XARA, back-annotate layout parasitics, and iterate with circuit teams to close timing and power.
Execute physical verification using DRC and LVS tools such as ICV or Calibre, debug violations, and drive layouts to clean signoff.
Collaborate with memory compiler architects and circuit designers to translate specifications into manufacturable, verified layout deliverables.
Script layout automation flows using TCL, Perl, or C-shell to improve productivity and ensure consistency across memory variants.
Support formal release cycles, including documentation, design rule checks, and handoff to product engineering and customers.

Requirements

Diploma in Electronics Engineering with 8+ years of layout design experience, or BE/BTech with 6+ years, or MS with 4+ years in a directly relevant role.
Deep hands-on experience with full custom layout design for embedded memories including floor planning, placement, power grid design, and signal routing.
Proficiency with layout tools such as Cadence Virtuoso or Custom Compiler, and physical verification tools like Mentor Calibre or Synopsys ICV.
Strong understanding of IR drop and electromigration analysis, including use of tools like XARA or RedHawk, and ability to close power integrity issues.
Solid knowledge of physical design methodologies across all phases: floor planning, place and route, DRC/LVS verification, and signoff.
Scripting capability in TCL, Perl, or C-shell to automate layout tasks and improve design flow efficiency.
Experience with memory compiler development, block placement, and parasitic-aware layout optimization is a strong plus.

Desired Qualifications

You can look at a layout and immediately spot the power grid weakness or the routing congestion that will cause problems three steps downstream.
When a circuit designer asks for a layout change that breaks your carefully optimized floor plan, you do not just say no, you explain the tradeoff and propose an alternative that works for both of you.
You keep your manager informed without being asked, you know when a schedule is slipping and you surface it early with a plan, not just a problem.
You are the person the team comes to when a tough DRC violation will not go away, because you have the patience and the methodology to track it down.
You adapt quickly when process rules change or a new node brings unexpected challenges, and you help the rest of the team do the same.
You take initiative to learn new tools and techniques, and you share what you learn so the whole team gets better.

Benefits

Competitive salaries.
Comprehensive medical and healthcare plans.
ETO and FTO Programs for time away.
Maternity and paternity leave, parenting resources, adoption and surrogacy assistance.
ESPP with a 15% discount on Synopsys common stock.
Retirement plans that vary by region and country.

Skills

CalibreICVXARATCLPerlC-shellCadence VirtuosoCustom CompilerRedHawk

#engineering#layout design#semiconductor#chip design#physical design#memory IP#AI accelerators#automotive systems

About Synopsys Inc

Smart, Secure Everything—From Silicon to Software Synopsys technology is at the heart of innovations that are changing the way we live and work. The Internet of Things. Autonomous cars. Wearables. Smart medical devices. Secure financial services. Machine learning and computer vision. These breakthroughs are ushering in the era of Smart, Secure Everything―where devices are getting smarter, everything’s connected, and everything must be secure. Powering this new era of technology are advanced silicon chips, which are made even smarter by the remarkable software that drives them. Synopsys is at…

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