Analog Design Staff Engineer

Technology, Data & Digital · Software & Web Development · Software Engineering · Embedded Systems

In short

Synopsys is seeking an experienced Analog Design Staff Engineer to design and develop high-speed IO circuits for next-generation memory interface PHY IPs, including DDR, HBM, and UCIe, in advanced process nodes. This role requires deep understanding of analog design fundamentals, device physics, and experience with advanced technologies, with a focus on performance, power, and area optimization.

Responsibilities

Design and develop high-speed IO circuits for next-generation memory interface PHY IPs including DDR, HBM, and UCIe in advanced CMOS, FinFET, and GAA process nodes.
Execute circuit design tasks from architecture through layout, simulation, and verification with a focus on performance, power, and area optimization.
Analyze and solve complex analog design challenges in advanced technology nodes where device behavior and parasitics significantly impact circuit performance.
Collaborate with global cross-functional teams including digital design, verification, layout, and product engineering to deliver integrated PHY solutions.
Apply ESD and reliability principles to ensure robust circuit design that meets product quality and long-term performance requirements.
Work within JEDEC specifications and memory interface standards to ensure compliance and interoperability across customer platforms.
Support silicon bring-up, characterization, and debug activities to validate design performance and drive continuous improvement.

Requirements

Bachelor's or Master's degree in Electronics Engineering, Electrical Engineering, or related field.
5 to 10 years of hands-on analog circuit design experience with demonstrated expertise in high-speed IO design.
Deep understanding of analog design fundamentals including device physics, transistor-level design, and circuit analysis.
Proven experience designing circuits in advanced technology nodes such as CMOS, FinFET, or GAA processes.
Strong analytical and problem-solving skills with the ability to debug complex analog and mixed-signal issues.
Knowledge of ESD protection schemes and reliability considerations in analog circuit design.
Experience with JEDEC memory interface standards (DDR, HBM, LPDDR) or familiarity with signal integrity and power integrity concepts is a plus.

Desired Qualifications

Ability to take a system-level timing budget and translate it into a circuit topology that meets it without over-designing or leaving margin on the table.
Understanding of when to trust the simulator and when to build margin into your design.
Comfortable presenting a design review to a room of architects and layout engineers, defending choices, and incorporating feedback.
Ability to stay organized across multiple design tasks, keep documentation current, and not let details slip even when schedules get tight.
Proactive in asking the right questions early, especially when requirements are ambiguous or when a spec does not account for real-world constraints.
Works well with people in different roles and time zones, and knows how to escalate issues before they become blockers.

Benefits

Comprehensive medical and healthcare plans that work for you and your family.
ETO and FTO Programs for time away.
Maternity and paternity leave, parenting resources, adoption and surrogacy assistance.
ESPP (Purchase Synopsys common stock at a 15% discount, with a 24 month look-back).
Retirement plans that vary by region and country.
Competitive salaries.
Competitive compensation.

Skills

Device PhysicsCircuit DesignTransistor-Level DesignCMOSFinFETGAAESDDDRHBMUCIeSignal IntegrityPower Integrity

#Semiconductor#Analog Design#High-Speed IO#Circuit Design#Chip Architecture#Verification#Memory Interface#PHY IP

About Synopsys Inc

Smart, Secure Everything—From Silicon to Software Synopsys technology is at the heart of innovations that are changing the way we live and work. The Internet of Things. Autonomous cars. Wearables. Smart medical devices. Secure financial services. Machine learning and computer vision. These breakthroughs are ushering in the era of Smart, Secure Everything―where devices are getting smarter, everything’s connected, and everything must be secure. Powering this new era of technology are advanced silicon chips, which are made even smarter by the remarkable software that drives them. Synopsys is at…

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