SOC Design Verification Sr Staff Engineer

Technology, Data & Digital · Software & Web Development · Software Engineering

In short

Qualcomm is seeking a SOC Design Verification Sr Staff Engineer in Bangalore, India to own SoC NSP/DSP/Audio DV. This role involves understanding design specifications, developing test plans, and collaborating with cross-functional teams to ensure the correctness of complex SoC designs.

Responsibilities

Own SoC NSP/DSP/Audio DV during project work for various product segments.
Understand the design specification and implementation.
Define the verification scope.
Develop test plans and tests.
Develop the verification infrastructure.
Verify the correctness of the design.
Analyze, develop and execute verification test cases.
Provide relevant solutions to issues.
Collaborate with architects, designers, and pre and post silicon verification teams.

Requirements

Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
Master's degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience.
PhD in Science, Engineering, or related field.
B.E/B.Tech/M.E/M.Tech in Electronics with 8+ year experience in verification domain.
Good understanding of Soc level verification testbench and flows.
Working knowledge and design understanding of Debug architecture of a SoC which includes Crash flow, JTAG, Trace, triggers, monitors, Scandump etc.
Exposure to Power aware simulations and Gate Level simulations.
Good understanding of processor based Soc level verification which includes Verilog, System Verilog and UVM based environment.
Good understanding of AHB/AXI & ATB-AMBA protocol.

Benefits

Qualcomm is committed to providing an accessible process.
Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process.
Qualcomm is also committed to making our workplace accessible for individuals with disabilities.

Skills

VerilogSystemVerilogUVMAHBAXIATBJTAGDebugAutomationC++

#ASIC#Verification#SoC#NSP#DSP#Audio#Design#Testbench#Flows#Debug Architecture#Crash Flow#Trace#Monitors#Scandump#Power Aware Simulations#Gate Level Simulations#Processor based verification#AMBA protocol