SoC Design and Integration Engineer

Technology, Data & Digital · Software & Web Development · Software Engineering · Embedded Systems · QA & Testing

In short

Join Qualcomm as an SoC Design and Integration Engineer in San Diego, CA, contributing to next-generation experiences in High Performance Compute and AI. This role involves RTL Design, flows, and methodology for high-performance ASICs in the latest process nodes, offering an opportunity to innovate and create new architectures.

Responsibilities

Execute architecture and design of SOC according to design protocol using tools/applications.
Resolve architecture, design, or verification problems with minimal supervision.
Execute design and verification strategies according to ASICs, SoC, and IP cores specifications.
Participate in design and architecture reviews, demonstrating analytical skills.
Identify areas for flow and process improvements through design techniques and automations.
Communicate effectively within the team and with peer teams, with good presentation skills.
Collaborate and share knowledge with team members to achieve common goals.
Provide feedback on Silicon learnings to process teams, design methodology, IP, and SoC design.

Requirements

Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
OR Master's degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience.
OR PhD in Science, Engineering, or related field.
Proven knowledge in Server/ Data Center IPs, protocols, and interfaces.
Experience in designing arithmetic/computational/machine learning IPs.
Great understanding of design techniques for speed and for power efficiency.
Determine architecture design, logic design, large-scale design integration and system simulation.
Experience in developing tools and scripting for process automation is an advantage.

Desired Qualifications

Master's degree in Electrical Engineering, Computer Science, or Computer Engineering.
5+ years of relevant experience in ASIC design, scripting and architecture.
Experience in designing arithmetic/computational/machine learning IPs.

Benefits

Competitive annual discretionary bonus program.
Opportunity for annual RSU grants.
Highly competitive benefits package designed to support success at work, at home, and at play.

Skills

ASIC designFPGA designRTL Designautomationscriptingarithmetic IPscomputational IPsmachine learning IPsServer IPsData Center IPsPCIePCI ExpressIC CompilerAssembly LanguageC

#ASIC#SoC#Design#Integration#Engineer#RTL#Verification#Validation#Architecture#High Performance Compute#AI