Senior SoC Debug Engineer

Technology, Data & Digital · Software & Web Development · Software Engineering · Embedded Systems

In short

Qualcomm is looking for a Senior SoC Debug Engineer to join their Silicon Validation team in San Diego, California. The role involves supporting pre-Si and post-Si enabling, bring-up, and debugging failures at the embedded platform level, with a focus on developing solutions for faster debug and utilizing Gen AI for automation. The ideal candidate will have 5-8 years of experience in related fields and a Bachelor's degree in Computer or Electrical Engineering.

Responsibilities

Bring up, debug, and analyze failures at the embedded platform level in both pre-Si and post-Si phases.
Support, develop, and implement solutions for faster debug at the platform level, including isolating failing components of a system.
Create debug strategies and plans for partners to more rapidly triage failures and isolate specific components, including PVT and marginality issues.
Utilize Gen AI for automation and enablement of the debug flow.

Requirements

5 to 8 years of experience with pre-si and post-silicon enabling, bring-up, and failure analysis at the embedded platform level.
RTL inspection and understanding of basic RTL.
Gen AI knowledge and experience for automating the Debug flow.
Support, develop, and implement solutions for faster debug at the platform level, including isolating failing components of a system.
Creating debug strategies and plans for partners to more rapidly triage failures to isolate specific components including PVT and marginality issues.
Debugging low level software and hardware issues.
Debug tools including JTAG.
Using Lab Equipment (Logic Analyzer, Scope, Signal Generator, etc.).

Desired Qualifications

Bachelor's degree in Computer Engineering and/or Electrical Engineering.
Preferred: Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
OR Master's degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience.
OR PhD in Science, Engineering, or related field.

Benefits

Competitive annual discretionary bonus program.
Opportunity for annual RSU grants.
Highly competitive benefits package designed to support success at work, at home, and at play.
Details about US benefits are available at a provided link.