Principal SoC HW (Analog/Functional) Validation Engineer
Technology, Data & Digital · Software & Web Development · Software Engineering
In short
Responsibilities
- Own post-silicon validation of PCIe, IO functional IO or electrical/analog interfaces.
- Define, guide, and contribute to the implementation of silicon debug tools and capabilities.
- Become an expert on the overall architecture, implementation of high speed IO interfaces (PCI, CXL, PLL, etc.) and their interactions with other parts of the SoC, with the platform, and with software.
- Provide technical guidance, coaching, and mentorship to other engineers in your areas of expertise.
- Develop validation strategy, requirements, environments, tools, and methodologies including debug board and hardware/software requirements.
- Apply knowledge of validation principles and techniques and judgment to write test plans and implement them by developing test content, scripts, tools and other validation collateral.
- Execute content in post-silicon, triage and debug failures.
- Engage with partners to drive continuous improvement to the design, to validation plans/collateral, and methodology.
- Collaborate with architects, logic designers, verification engineers, other post-silicon validators, and IP and tool providers.
- Provide high quality results on schedule.
- Provide technical leadership with respect and integrity.
- Apply expertise towards pre-silicon verification plans, tests, and debug of your area.
Requirements
- Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years technical engineering experience OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 6+ years technical engineering experience OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 8+ years technical engineering experience OR equivalent experience.
- Ability to meet Microsoft, customer and/or government security screening requirements.
- Ability to meet Microsoft Cloud Background Check requirements.
- Ability to meet export control regulations requirements.
Desired Qualifications
- Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 5+ years technical engineering experience OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 8+ years technical engineering experience OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 12+ years technical engineering experience OR equivalent experience.
- 1+ year(s) experience working on or leading projects from beginning-to-end.
- Applied understanding of Computer Architecture and CPU/SoC validation principles, including: Understanding of SoC subsystem, SoC system level, and platform level functionality and writing scripts/software with industry standard languages like Python or C/C++.
- Proficient communication, collaboration and teamwork skills and ability to lead, grow, and contribute to diverse and inclusive teams.
- Verification, logic development, analog validation, or validation tools experience as part of a CPU, SoC and/or IP development team.
- Demonstrated leadership skills.
- Demonstrated validation expertise in one or more of the following: Validation of: Functional IO interfaces (PCIe, CXL, USB, etc.), Electrical: Serdes, IO, high speed interconnect, analog circuits, Power and Performance, Automation, Content Creation, or Tools/Scripts Development.
- Ability to develop synthetic SoC validation Core, Coherency, Memory, and IO content to run on both bare metal and OS environments.
- Ability to develop sophisticated tools/scripts to support SoC validation debug activities such as maximum power, current transients, and register dumps.
- Understanding of board level schematics.
- Understanding system level software and firmware.
- Experience running silicon content on pre-silicon platforms such as emulation or FPGA.
- Demonstrated success in hardware/software debug efforts.
- Hands on expertise debugging silicon failures using on chip debug features (like trace or JTAG) as well as test equipment (like oscilloscopes, protocol analyzers, bit error rate testers, logic analyzers).
Benefits
- The typical base pay range for this role across the U.S. is USD $142,800 - $274,800 per year.
- There is a different range applicable to specific work locations, within the San Francisco Bay area and New York City metropolitan area, and the base pay range for this role in those locations is USD $188,000 - $304,200 per year.
- Certain roles may be eligible for benefits and other compensation.
Skills
Every company has a mission. What's ours? To empower every person and every organization to achieve more. We believe technology can and should be a force for good and that meaningful innovation contributes to a brighter world in the future and today. Our culture doesn’t just encourage curiosity; it embraces it. Each day we make progress together by showing up as our authentic selves. We show up with a learn-it-all mentality. We show up cheering on others, knowing their success doesn't diminish our own. We show up every day open to learning our own biases, changing our behavior, and inviting…
Company
MicrosoftJob Posted
1 day ago
Employment Type
Full Time
Work mode
Hybrid
Salary
US$142,800–274,800 · Negotiable
Experience Level
Senior
Locations
United States
Qualification
Applicants
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