Package Design Engineer - Staff
Technology, Data & Digital · Software & Web Development · Software Engineering
In short
Qualcomm's Data Center team is seeking a highly talented Staff Package Design Engineer to develop high-performance, energy-efficient server solutions. The role involves driving advanced package selection, physical design, optimization, and working with multi-functional teams to achieve superior mechanical, electrical, and thermal performance for various chip types.
Responsibilities
- Own and drive advanced package selection, new generation product package structure, and configuration optimization.
- Responsible for Package/SIP physical design and layout, optimization, DV, and tape out.
- Work with multi-functional teams to achieve optimized mechanical, electrical, and thermal performance for various types of chips.
- Implement the physical design of packages and modules for SoC.
- Interface and coordinate with multi-functional groups throughout Qualcomm on new product package/SiP feasibility analysis, design, and selection.
- Define and develop design verification and automation strategy to strengthen and streamline package design and release flows.
- Work multi-functionally to optimize package pin out.
- Ensure package design is optimized with SI/PI requirements.
- Drive methodology, innovations, and efficiency improvements in package design together with vendors and developers on feature development and bug resolution.
- Explore, evaluate, and develop new CAD tools, design, and verification flow.
- Partner with BU PD team to optimize chip Floorplan and bump placement and optimize the package size.
Requirements
- Proficient in Cadence APD & SiP and/or Siemens Xpedition Package Designer (xPD).
- Familiar in using Constraint Manager in Package design tool for setting up DFM rules and electrical rules
- Experience in using in-line DRC checking, DFM verification, Electrical Rule Checking (ERC) preferred.
- Basic knowledge in signal-integrity for high-speed IO interfaces, transmission line & electromagnetic field theory.
- Knowledge of IC packaging structures, chip-package, and package-board interaction.
Desired Qualifications
- Master's degree in electrical engineering, mechanical engineering, material science, or related fields with 5+ years of experience.
- Proven fundamentals in electrical, material, thermal, or mechanical engineering fields.
- Familiarity with various sophisticated package configurations and assembly/substrate technology (Flip chip BGA, 2.5D/3D Interposer, etc.).
- Experience in package design and proficiency in Cadence Allegro platform tools (PCB Editor, Advanced Package Designer, APD/SiP).
- Basic understanding of some SI/PI tools (XtractIM, PowerSI, HFSS, Q3D, etc.), package model extraction, S-parameters, and RLGC model.
- Basic knowledge of substrate manufacturing process, structure, design rules, and material properties.
- Proven understanding of high-speed interfaces, including DDR, PCIe, UCIE, etc.
- Experience with Calibre tool and package design reviews.
- Knowledge of high-speed layout constraints (crosstalk mitigation, differential pairs).
- Solid understanding of Design Rules Check and Design for Manufacturing.
Benefits
- Competitive annual discretionary bonus program
- Opportunity for annual RSU grants
- Highly competitive benefits package designed to support your success at work, at home, and at play.
Skills
Cadence APD & SiPSiemens Xpedition Package DesignerConstraint ManagerDFMERCSignal IntegrityTransmission Line TheoryElectromagnetic Field TheoryIC Packaging StructuresChip-Package InteractionPackage-Board InteractionCadence AllegroPCB EditorAdvanced Package DesignerXtractIMPowerSIHFSSQ3DS-parametersRLGC modelSubstrate Manufacturing ProcessDDRPCIeUCIECalibreCrosstalk MitigationDifferential PairsDesign Rules Check
#Data Center#Server Solution#High Performance#Energy Efficient#Package Design#SoC#CAD tools#Design Verification#Automation#SI/PI
Enabling a world where everyone and everything can be intelligently connected.\n\n
Company
QualcommJob Posted
1 day ago
Employment Type
Full Time
Work mode
On Site
Salary
US$160,200–240,200 · Negotiable
Experience Level
Senior
Locations
San Diego, United States of America
Qualification
Master
Applicants
Be an early applicant
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