Modem HW Design Engineer – AI Driven Next Gen Modem Hardware Development

Technology, Data & Digital · Software & Web Development · Software Engineering · Embedded Systems

In short

Qualcomm is looking for a skilled Modem Hardware Design Engineer to join their team in San Diego, California. This role focuses on AI-driven methodologies and next-generation modem hardware development, utilizing GenAI, ML, and agentic-AI automation frameworks. The engineer will be responsible for defining specifications, developing RTL, and optimizing designs in collaboration with cross-functional teams.

Responsibilities

Define specifications and architecture/micro-architecture.
Develop RTL.
Optimize for area, power, and performance.
Collaborate within the hardware team (verification, modeling, physical implementation).
Engage with system, RF, firmware, and software teams to deliver first-time-right silicon.

Requirements

Bachelor's degree in Computer Engineering, Computer Science, Electrical Engineering, or related field and 4+ years of relevant work experience.
Master's degree in Computer Engineering, Computer Science, Electrical Engineering, or related field and 3+ years of relevant work experience.
PhD in Computer Engineering, Computer Science, Electrical Engineering, or related field and 2+ years of relevant work experience.
BS or MS degree and 5+ years of relevant industry experience.
Strong expertise in RTL coding and logic design for wireless modem ASICs or custom datapath components for DSP applications.
Solid understanding of Verilog, SystemVerilog, C/C++, and SystemC.
Experience with synthesis, industry LINT, clock domain crossing, low power design and verification.
Background in wireless/wireline modem technology, DSP, or communication systems.
Experience with Generative AI, ML, or agentic-AI‑based automation.
Proficiency with Unix/Linux shell scripting, Python/Perl, Makefiles, XML.
Excellent communication, collaboration, and critical‑thinking skills.

Desired Qualifications

Knowledge of 4G/5G 3GPP physical layer standards is a strong plus.
Ultra-deep sub-micron CMOS technology nodes such as 4nm and below.

Benefits

Competitive annual discretionary bonus program.
Opportunity for annual RSU grants.
Highly competitive benefits package designed to support success at work, at home, and at play.

Skills

VerilogSystemVerilogC/C++SystemCPythonPerlGenAIML

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