Master Thesis: FPGA-Based Post-Quantum Cryptosystem Development

Technology, Data & Digital · Software & Web Development · Software Engineering · Embedded Systems

In short

This Master Thesis project focuses on developing FPGA-based post-quantum cryptosystems to address future security threats from quantum computing. The project involves implementing PQC algorithms, exploring hardware acceleration, and enhancing crypto-agility, with potential research areas including co-design, shared-datapath accelerators, and hardware masking.

Responsibilities

Implement FPGA-based post-quantum cryptography (PQC) elements.
Design a minimal hardware-assisted verifier for hash-based signature schemes to anchor secure boot.
Analyze trade-offs between FPGA acceleration and software execution for verification sub-operations.
Develop a crypto-agile accelerator supporting multiple PQC primitives by sharing building blocks.
Quantify area savings and performance costs of resource sharing in accelerators.
Design hardware masking for a specific PQC algorithm to improve resistance to side-channel attacks.
Investigate improvements for masked ML-DSA to reduce its high time penalty.

Requirements

Currently studying electrical engineering or computer science.
Experience with digital circuit design on FPGAs.
Proficiency in a hardware description language (HDL).
Interest in cybersecurity and its underlying mathematical concepts.
Passion for creating efficient, high-performance embedded software and digital circuits.

Desired Qualifications

Recent progress in quantum computing has raised the prospect that cryptosystems in common use today may not be secure in the future.
“Harvest now, decrypt later” attacks pose a threat on longer timescales.
High interest in post-quantum cryptography (PQC).
NIST has standardized post-quantum algorithms for digital signing and key exchange.
The EU mandates the use of PQC in the Cyber Resilience Act.
PQC algorithms typically have greater computational complexity and larger key/signature sizes.
FPGAs are uniquely positioned as cryptosystem accelerators or hardware roots of trust.
Parallelizable PQC algorithms implemented on FPGAs can execute faster and use less energy compared to software implementations.
Unlike ASICs, FPGAs can be reprogrammed in the field to support new algorithms without replacing the hardware.
Crypto flexibility and crypto agility are highly desired properties.

Benefits

Outstanding opportunity to use skills and imagination.
Build solutions to tough problems.
Be challenged in a team of diverse innovators.
Opportunity to craft what comes next.

Skills

FPGAHardware Description LanguageHDLCybersecurityEmbedded SoftwareDigital CircuitsHardware AccelerationML-DSASLH-DSALMS/XMSSKeccakNTT

#FPGA#Post-Quantum Cryptography#Cybersecurity#Master Thesis#Hardware Acceleration#Digital Design#Embedded Systems#Sweden

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