Design Verification Manager, Silicon

Technology, Data & Digital · Software & Web Development · Software Engineering

In short

Google is seeking a Design Verification Manager for Silicon in Bengaluru, India. This role involves leading verification activities for complex SoCs, managing engineering teams, and driving emulation strategies. The ideal candidate has extensive experience in front-end design/verification and power-aware methodologies.

Responsibilities

Lead and manage comprehensive verification activities for complex System-on-Chip (SoC) architectures, ensuring robust quality standards from pre-silicon to tape-out.
Manage and mentor high-performing engineering teams, driving execution, fostering a culture of technical excellence, and supporting career growth.
Drive SoC-level pre-silicon emulation strategies (e.g., Palladium, Zebu, SimXL) to accelerate hardware-software co-verification, boot operating systems, and catch complex system-level bugs early.
Oversee complex post-silicon debug activities, collaborating closely with post-silicon validation teams to root-cause silicon issues, bring up hardware, and correlate pre-silicon verification coverage with actual silicon behavior.
Develop and scale aspects of logic verification infrastructure and advanced methodologies across the SoC, maintaining strong integration standards with architecture, design, and cross-functional teams.

Requirements

Bachelor's degree in Electrical Engineering, Computer Science, or equivalent practical experience.
15 years of experience in front-end design or design verification.
Experience in power-aware verification methodologies.
Experience in fabric and interconnect architectures and cache coherency protocols.
Experience directly managing high-performing engineering teams with a proven track record of successfully delivering complex, production-grade SoCs.
Experience in SoC-level verification and strong design verification (DV) fundamentals using universal verification methodology (UVM)-based environments, and with pre-silicon emulation platforms and hardware accelerators (e.g., SimXL, formal verification, or portable stimulus standard/PSS).
Excellent programming skills in SystemVerilog, Verilog, and scripting languages like Python or Perl.

Desired Qualifications

Master's degree in Electrical Engineering or Computer Science or equivalent practical experience.
Experience in verification of high-bandwidth memory subsystems (DDR5, LPDDR5, HBM) including physical layer (PHY) training, memory controllers, and JEDEC compliance.

Benefits

Equity is granted exclusively and discretionarily by Alphabet Inc.

Skills

SystemVerilogVerilogPythonPerlUVM

#Silicon#Verification#SoC#Manager#Hardware

About Google

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