ASIC Design Verification Engineer (Security Group) - Sr Staff

Technology, Data & Digital · Software & Web Development · Software Engineering

In short

Qualcomm Technologies, Inc. seeks an experienced ASIC Design Verification Engineer for their Security Group in Santa Clara, California. This senior role involves validating complex micro-architectures, developing verification methodologies, and ensuring the functionality of secure designs through rigorous testing and coverage analysis.

Responsibilities

Work with subsystem and SOC Architects to understand concepts and high-level system requirements.
Develop detailed Test and Coverage plans based on Architecture and Micro-architecture.
Develop Verification Methodology, ensuring scalability and portability across environments.
Develop Verification environment, including Stimulus, Checkers, Monitors, Assertions, and Coverpoints.
Develop Verification Plans and Testbenches for functional domain.
Execute Verification Plans, including Design Bring-up, DV environment Bring-up, Regressions enabling all features, and Debug of test failures.
Track and report DV progress using metrics, including Bugs and Coverage.
Leverage advanced knowledge of computer architecture, micro-architecture, logic design, circuits, and/or physical design to develop and verify critical high performance and secure designs.
Anticipate, identify, and solve highly-complex problems to ensure design completeness, functionality, power, and performance.
Collaborate with cross-functional teams to define requirements, specifications, and trade-offs.
Evaluate all aspects of the design process from conceptualization to productization.
Write detailed technical documentation for highly complex secure subsystem designs; review documentation of junior engineers.
Propose meetings and technical discussions to review Test Plans, debug issues and incorporate feedback.
Run and Analyze Coverage reports, understand Coverage holes and re-spin Test Plans to achieve coverage metrics.

Requirements

10+ years in SOC-level verification.
Good understanding of debugging either ARM-based or RISC-V based processors.
Good understanding of APB/AHB/AXI protocols.
Solid understanding of SV/UVM concepts.
Basic understanding on UNIX commands and Python/Perl scripting.
SystemVerilog
UVM
Synopsys VCS/Verdi
Makefile automation
Python scripting
Assertion-based verification
Functional coverage
Bachelor's degree in Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration, or related work experience.
OR Master's degree in Science, Engineering, or related field and 5+ years of ASIC design, verification, validation, integration, or related work experience.
OR PhD in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.

Desired Qualifications

Prior experience in any cryptographic algorithm is preferred.
Deep knowledge of APB/AXI/SPI protocols, handshake mechanisms, cross-clock domains and clock gating.
Solid understand of memory organization, fault-tolerant design, parity schemes, error detection and error correction schemes.
Advance techniques such as: Formal, Assertions, and Silicon bring-up, is helpful.
In-depth knowledge of Micro-processor functions, Network-on-Chip Architectures, and Micro-architectures.
Experience in writing Test plans, portable Testbenches, Transactors, and Assembly code.
Experience with different Verification Methodologies and Tools such as Simulators, Coverage collection, Gate-level Simulation, Waveform viewers, and Mixed signal Verification.
Ability to develop and work independently on a Block/Unit of the design.

Benefits

Competitive annual discretionary bonus program.
Opportunity for annual RSU grants.
Highly competitive benefits package designed to support your success at work, at home, and at play.
Reasonable accommodations to support individuals with disabilities to be able to participate in the hiring process.

Skills

SystemVerilogUVMSynopsys VCS/VerdiMakefile automationPython scriptingAssertion-based verificationFunctional coverageARM-based processorsRISC-V based processorsAPB protocolAHB protocolAXI protocolPerl scriptingUNIX commandscryptographic algorithmSPI protocolMicro-processor functionsNetwork-on-Chip ArchitecturesAssembly codeMixed signal Verification

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