Verification Design Engineer
Teknik, data och digitalt · Mjukvaru- och webbutveckling · Mjukvaruutveckling
I korthet
Ansvarsområden
- Develop and execute verification strategies for PHY, DDRIO, UCIe, and other high-speed interface IP.
- Architect and develop SystemVerilog/UVM testbenches, verification environments, test plans, and reusable verification components.
- Create directed and constrained-random tests, assertions, functional coverage, and coverage models.
- Drive functional and code coverage closure, regression analysis, and verification signoff.
- Debug complex RTL, protocol, testbench, and system-level issues in partnership with design engineers.
- Verify block- and subsystem-level functionality, including interfaces, resets, clocking, low-power behavior, and error scenarios.
- Collaborate closely with RTL design, architecture, firmware, modeling, and implementation teams.
- Mentor engineers and help drive verification methodology and best practices.
Krav
- BS in Electrical Engineering, Computer Engineering, or related field with 12+ years of relevant experience, or MS with 10+ years of experience.
- Strong experience in ASIC/IP design verification.
- Advanced proficiency with SystemVerilog and UVM.
- Experience developing verification environments, test plans, assertions, functional coverage, and constrained-random tests.
- Strong RTL and waveform debugging skills.
- Experience with PHY, DDR/DDRIO, UCIe, SERDES, PCIe, CXL, or similar high-speed interface technologies.
- Understanding of the complete ASIC/IP development and verification lifecycle.
- Strong analytical, problem-solving, and communication skills.
Önskade kvalifikationer
- Experience verifying complex IP at the block and subsystem level.
- Experience with coverage-driven verification and verification closure.
- Familiarity with low-power verification, clock/reset verification, and protocol checking.
- Experience with industry-standard simulation, debug, coverage, and verification tools.
- Experience mentoring engineers or providing technical verification leadership.
Förmåner
- Comprehensive medical and healthcare plans.
- ETO and FTO Programs.
- Maternity and paternity leave, parenting resources, adoption and surrogacy assistance.
- ESPP with a 15% discount.
- Retirement plans.
- Competitive salaries.
- Annual bonus, equity, and other discretionary bonuses may be eligible.
- Comprehensive health, wellness, and financial benefits.
Färdigheter
Smart, Secure Everything—From Silicon to Software Synopsys technology is at the heart of innovations that are changing the way we live and work. The Internet of Things. Autonomous cars. Wearables. Smart medical devices. Secure financial services. Machine learning and computer vision. These breakthroughs are ushering in the era of Smart, Secure Everything―where devices are getting smarter, everything’s connected, and everything must be secure. Powering this new era of technology are advanced silicon chips, which are made even smarter by the remarkable software that drives them. Synopsys is at…
Företag
Synopsys IncPublicerade jobb
för 4 dagar sedan
Anställningstyp
Heltid
Arbetsform
På plats
Lön
138 000–208 000 US$ / år
Erfarenhetsnivå
Senior
Platser
Boxborough, United States
Kvalifikation
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