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Tech IP Library Characterization Engineer

Teknik, data och digitalt · Mjukvaru- och webbutveckling · Mjukvaruutveckling · Inbyggda system

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I korthet

Qualcomm is seeking a Tech IP Library Characterization Engineer in Tijuana, Baja California, Mexico. The role requires strong IP modeling, Char tool expertise, and automation skills, with hands-on experience in EDA tool automation, data analysis, and large-scale software automation. A strong understanding of statistical Liberty timing and power models, along with Front-end Verilog views, is essential.

Ansvarsområden

  • Join the TECHIP team focusing on IP modeling, characterization tools, and automation.
  • Utilize hands-on experience in EDA tool automation, data analysis, and visualization.
  • Enable large-scale software automation.
  • Work on characterization flow and sign-off methodologies.
  • Collaborate with multi-site project teams and third-party vendors.

Krav

  • Strong Std cell / Memory circuit knowledge & IP characterization, Design Kit delivery background.
  • Strong logical and problem-solving skills with excellent analytical and debugging skills.
  • Strong Software programming skills in Python or Perl in UNIX/Linux computing platform.
  • Highly motivated, excellent team spirit and good communication skills.
  • Ability to work in multi-site project teams and with third-party vendors.

Önskade kvalifikationer

  • In-depth technical knowledge of CMOS, FinFET logic and transistor, basic of digital circuit design optimization.
  • Familiarity with industry standard Design kit (DK) views, Liberty formats for foundation IPs (advanced modeling formats CCS, LVF), statistical variation models & worked on development of the same.
  • Familiarity with front end pre-silicon design flow, RTL design/coding, logic design, Verilog/ System Verilog, RTL design verification, System Verilog Assertion (SVA), Design for Test, BIST modeling experience.
  • Expertise in scripting in Python (data-analytics), Perl & experience in developing large scale automation from scratch.
  • Experience in STA, physical design is a plus.
  • Experience of spice simulation models, design rules verification procedures (like DRC/LVS/ERC) is a plus.
  • Experience with industry standard chip design tools and design flows for Static Timing Analysis, Spice / Fast spice simulation, Synthesis, DFT, Power Analysis.

Förmåner

  • Opportunity to drive cutting-edge tools and flows in a QCOM environment.
  • Qualcomm is an equal opportunity employer committed to providing accessible processes for individuals with disabilities.
  • Reasonable accommodations will be provided upon request for individuals with disabilities.
#ASICS Engineering#IP modeling#EDA tool automation#data analysis#visualization#software automation#statistical Liberty timing#power model#Verilog#Front-end Verilog#Silicon reliability modeling#CMOS#FinFET#digital circuit design#Design kit#Liberty formats#foundation IPs#CCS#LVF#statistical variation models#pre-silicon design flow#RTL design#logic design#RTL design verification#System Verilog Assertion (SVA)#Design for Test#BIST#STA#physical design#spice simulation#DRC#LVS#ERC#chip design tools#Static Timing Analysis#Spice simulation#Fast spice simulation#Synthesis#DFT#Power Analysis
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Företag

Qualcomm

Publicerade jobb

för 1 månad sedan

Anställningstyp

Heltid

Arbetsform

På plats

Erfarenhetsnivå

Medarbetare

Platser

Tijuana, Mexico

Kvalifikation

Kandidatexamen, Masterexamen

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