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Serdes PHY Analog Design Engineer

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Qualcomm is looking for an experienced analog circuit designer with over 8 years of experience to work on high-speed SerDes PHYs for next-generation SoCs. The role involves designing low-power analog circuits, performing schematic to post-layout verification, and collaborating with cross-functional teams for integration and post-silicon bring-up.

Ansvarsområden

  • Design high speed SerDes PHYs for SoCs.
  • Architect and design low-power analog circuits for wireless products.
  • Design multiple analog building blocks such as LDO, high-speed TX and RX (Equalizer, Sampler, PI, Deserializer etc), Bias, Reference.
  • Design Analog and/or Digital PLLs for frequency synthesis and/or SerDes applications.
  • Perform schematic to post layout verification, integration sign-off to post silicon bring up.
  • Work closely with RTL, DD, PD, DV and SoC verification teams to integrate the PHY.
  • Perform PHY lead roles including PHY integration to SOC and interaction with post silicon teams like HSIO, ATE, SVE, CE.
  • Utilize SPICE simulators, adexl & virtuoso for design and verification.
  • Automate circuit design and verification work using Shell/Perl-python scripting.
  • Work with teams across the globe and possess good communication and presentation skills.

Krav

  • Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience.
  • Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience.
  • PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.
  • 8+ years of experience as an analog circuit designer.
  • Experience in designing multiple analog building blocks - LDO, high speed TX and RX (Equalizer, Sampler, PI, Deserializer etc), Bias, Reference etc.
  • Experience in Analog and or Digital PLLs for frequency synthesis and/or SerDes applications (Charge pump, loop filter, VCO/DCO, PFD/TDC, high speed dividers).
  • Understanding of PLL Loop Dynamics, Jitter sources and modeling (RJ & DJ).
  • Ability to take a design from schematic to post layout verification, integration sign-off to post silicon bring up.
  • Experience with post-Si bring-up and debug is a must.
  • Understanding of advance Finfet process effects on designs and layout is required.

Önskade kvalifikationer

  • Experience with peripheral PHYs (USBs, UFS, PCIe) protocols is an added advantage.
  • Mixed signal design experience is preferred.
  • Good communication and presentation skills.

Förmåner

  • Qualcomm is an equal opportunity employer.
  • Qualcomm is committed to providing an accessible process for individuals with disabilities.
  • Qualcomm is committed to making our workplace accessible for individuals with disabilities.
#Serdes#PHY#Analog Design#Hardware Engineering#Electrical Engineering#Mixed-Signal Design#FinFETs
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Företag

Qualcomm

Publicerade jobb

för 1 dag sedan

Anställningstyp

Heltid

Arbetsform

På plats

Erfarenhetsnivå

Mellannivå

Platser

Bangalore, India

Kvalifikation

Kandidatexamen, Masterexamen, Doktorand

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