The Job

Senior/Principal Interface IP Verification Engineer (Pre-Silicon) - 18383

Teknik, data och digitalt · Mjukvaru- och webbutveckling · Mjukvaruutveckling · Inbyggda system

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I korthet

Synopsys is seeking an experienced ASIC Verification Engineer for a Senior/Principal Interface IP Verification Engineer role. This position focuses on verifying industry-leading PCIe, CXL, DDR, and Ethernet technologies crucial for AI accelerators, data centers, and networking platforms. The role involves architecting and developing UVM-based verification environments and driving functional coverage closure.

Ansvarsområden

  • Own verification of complex Interface IP solutions, including PCIe, CXL, DDR, and Ethernet technologies.
  • Architect, develop, and enhance scalable UVM-based verification environments and reusable verification IP.
  • Define verification strategies and test plans from specification review through product release.
  • Develop constrained-random, coverage-driven verification solutions using SystemVerilog and UVM.
  • Drive functional coverage closure and verification signoff activities.
  • Debug challenging RTL, protocol, and system-level issues while improving verification efficiency and automation.
  • Partner closely with architecture, RTL, firmware, and systems teams to identify issues early and ensure robust product quality.
  • Mentor engineers contributing to verification methodology improvements across the organization.

Krav

  • BSEE with at least 8 to 10+ years of direct industry experience with proven experience verifying complex ASIC or SoC designs.
  • Deep expertise with SystemVerilog and UVM methodologies.
  • Strong protocol knowledge in one or more of the following areas: PCIe, CXL, DDR Memory Interfaces, Ethernet.
  • Experience developing constrained-random and coverage-driven verification environments.
  • Strong debugging and problem-solving skills spanning RTL, verification, and protocol compliance.
  • Experience with industry-standard simulators such as VCS, ModelSim, or similar tools.
  • Ability to independently drive technical initiatives while collaborating across geographically distributed teams.

Önskade kvalifikationer

  • Experience with verification IP development.
  • Experience with assertion-based verification and formal methodologies.
  • Knowledge of modern SoC architectures and high-speed communication interfaces.

Förmåner

  • Competitive base salary range of $138000-$208000.
  • Annual bonus, equity, and other discretionary bonuses may be eligible.
  • Comprehensive health, wellness, and financial benefits.
  • Opportunity to solve complex technical challenges.
  • Work alongside industry-recognized experts.
  • Influence products used across the global semiconductor industry.
  • Advance technical leadership and career growth.
  • Contribute to technologies shaping the future of computing.
#hardware#semiconductor#asic verification#interface ip
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Företag

Synopsys Inc

Publicerade jobb

för 1 månad sedan

Anställningstyp

Heltid

Arbetsform

På plats

Erfarenhetsnivå

Senior

Platser

Austin, United States

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