Senior Signal Integrity Engineer

Teknik, data och digitalt · Mjukvaru- och webbutveckling · Mjukvaruutveckling · Inbyggda system

I korthet

As a Senior Signal Integrity Engineer at Qualcomm Technologies, Inc., you will be responsible for the end-to-end signal and power integrity architecture, analysis, and signoff for advanced connectivity platforms. This role involves acting as a system SI/PI owner and technical leader for high-speed interfaces and system margins across silicon, package, and board teams.

Ansvarsområden

  • Own end-to-end SI/PI closure for programs from pre-silicon to production.
  • Define design targets and layout design guidelines for high-speed interfaces.
  • Influence architecture decisions early in the product lifecycle.
  • Ensure SI/PI alignment with product KPIs including performance, yield, power, and cost.
  • Ensure compliance with industry standards like JEDEC, PCI-SIG, MIPI, and IEEE.
  • Influence PDN architecture definition at system and package levels, proposing cost-effective solutions.
  • Partner with SoC/PHY design teams, Package engineering, Board/system teams, and OEM/ODM ecosystem.
  • Lead design reviews and signoff decisions.
  • Represent SI/PI in program reviews and leadership forums.
  • Drive correlation between pre-silicon models and silicon/lab data.
  • Lead debug of issues related to eye collapse, jitter margin, crosstalk, power noise, and silicon-package-board interactions.
  • Drive adoption of best practices and improvements in system SI/PI methods across programs.

Krav

  • 4+ years of experience in Signal Integrity / Power Integrity / High-speed systems.
  • Expertise in Transmission line theory, EM fundamentals, SI/PI interactions, and jitter/noise coupling.
  • Hands-on experience with tools such as HFSS, ADS, Sigrity, CST, SIwave, HSPICE.
  • Hands-on experience with measurement instruments such as VNA, TDR, real-time scopes.
  • Experience with high-speed interfaces such as LPDDR4/5/6, PCIe Gen4/5/6/7, USB4, UFS, 10G–112G+ PHYs, MIPI CSI/DSI, and System PDN.

Önskade kvalifikationer

  • Bachelor's degree in Chemical Engineering, Electrical Engineering, Mechanical Engineering, or related field and 2+ years of System/Package Design/Technology Engineering or related work experience.
  • Master's degree in Chemical Engineering, Electrical Engineering, Mechanical Engineering, or related field and 1+ year of System/Package Design/Technology Engineering or related work experience.
  • PhD in Chemical Engineering, Electrical Engineering, Mechanical Engineering, or related field.

Förmåner

  • Competitive annual discretionary bonus program.
  • Opportunity for annual RSU grants.
  • Highly competitive benefits package designed to support success at work, at home, and at play.
  • Details about US benefits are available at a link.
#Signal Integrity#Power Integrity#Packaging Engineering#High-speed interfaces
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Företag

Qualcomm

Publicerade jobb

för 2 veckor sedan

Anställningstyp

Heltid

Arbetsform

På plats

Erfarenhetsnivå

Senior

Platser

San Diego, United States of America

Kvalifikation

Kandidatexamen, Masterexamen, Doktorand

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