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Senior Power Engineer

Teknik, data och digitalt · Mjukvaru- och webbutveckling · Mjukvaruutveckling · Inbyggda system

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Qualcomm is looking for a Senior Power Engineer in Noida, India to focus on RTL power optimization, analysis, and debugging for ASICs. The role requires strong Python skills and familiarity with low-power design techniques and tools.

Ansvarsområden

  • Define, model, design, optimize, verify, validate, implement, and document IP (block/SoC) development for high performance, high quality, low power products.
  • Collaborate with cross-functional groups to determine product execution path.
  • Perform RTL power optimization, including understanding switching activity, clock/enable efficiency, and low-power design patterns.
  • Conduct RTL power analysis and optimization using tools like PowerArtist, PTPX, or PowerPro.
  • Apply low-power design techniques, including clock gating, power gating, and managing dynamic vs. leakage power tradeoffs.
  • Understand Emulation Power flow and methodology.
  • Gain knowledge of backend flows such as logic synthesis and place-and-route, and their impact on post-layout power and timing.
  • Debug RTL or gate-level power anomalies and identify root-cause structures or scenarios.
  • Build automation scripts, data pipelines, and AI/ML-driven analysis flows for RTL power optimization using Python.

Krav

  • Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
  • OR Master's degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience.
  • OR PhD in Science, Engineering, or related field.
  • 3+ years of experience with a Bachelor's degree in Computer Science/Computer Engineering/relevant technical field, or a Master's degree.
  • Understanding of RTL power optimization fundamentals.
  • Familiarity with RTL power analysis and optimization using tools such as PowerArtist, PTPX, PowerPro or equivalent.
  • Familiarity with low-power design techniques.
  • Knowledge of Emulation Power flow and methodology.
  • Knowledge of backend flows such as logic synthesis and place‑and‑route.
  • Hands-on experience of debugging RTL or gate‑level power anomalies.
  • Strong Python programming skills.
  • Excellent debugging, analytical, and problem-solving skills using data-driven approach.
  • Excellent written and verbal communication skills.
  • Excellent collaboration skills.
#power engineering#ASIC#RTL#low-power design
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Företag

Qualcomm

Publicerade jobb

för 4 dagar sedan

Anställningstyp

Heltid

Arbetsform

På plats

Erfarenhetsnivå

Senior

Platser

Noida, India

Kvalifikation

Kandidatexamen, Masterexamen, Doktorand

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