Senior Lead Physical Design Engineer
Bygg, teknik och hantverk · Bygg- och industriteknik · Elektroteknik
I korthet
Qualcomm is looking for a Senior Lead Physical Design Engineer in Noida, India, to be responsible for PNR implementation on latest technology nodes. This role requires extensive experience in STA, power analysis, and other signoff domains.
Ansvarsområden
- Complete ownership on PNR implementation (Floorplanning, Placement, CTS, post_route,etc) on latest nodes.
- Signoff knowledge is mandatory (STA,Power analysis,FV, low power verification, PV,etc).
Krav
- Bachelor's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience.
- Master's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
- PhD in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience.
- 5+ years Hardware Engineering experience or related work experience.
- 5+ years' experience with PNR flow in latest tech nodes (e.g., 4nm/5nm/7nm/10nm)
- Good hands-on experience on Floorplanning, PNR and STA flows
- Good knowledge on Placement/Clock Tree Synthesis (CTS), optimization, etc
- Good understanding on signoff domains– LEC/CLP/PDN knowledge, etc
- Good knowledge on Unix/Linux – Perl/TCL fundamentals/scripting
Önskade kvalifikationer
- Quick learner with good analytical and problem-solving skills
Förmåner
- Qualcomm is an equal opportunity employer.
- Qualcomm is committed to providing an accessible process.
- Qualcomm is committed to making our workplace accessible for individuals with disabilities.
- Qualcomm expects its employees to abide by all applicable policies and procedures.
#ASIC#PNR#Floorplanning#Placement#CTS#STA#Signoff#Power analysis#FV#low power verification#PV