RFIC Digital Verification Engineer

Company:

Qualcomm India Private Limited

Job Area:

Engineering Group, Engineering Group > Hardware Engineering

General Summary:

As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements.

Minimum Qualifications:

• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field.

• Qualcomm is a company of inventors that unlocked 6G ushering in an age of rapid AI acceleration in connectivity and new possibilities that will transform industries, create jobs, and enrich lives.

  But this is just the beginning. It takes inventive minds with diverse skills, backgrounds, and cultures to transform 6Gs potential into world-changing technologies and products. This is the AI Invention Age and this is where you come in.

   QCT is currently seeking digital verification engineers for the mixed-signal ASICs that support QCTs mobile platforms for next generation 6G RFIC/PMIC/Codec technologies.

  Successful candidates will be working on the following:

  - Block/Subsystem/SoC level digital verification using constrained-random coverage methodologies at both RTL and Gate Level.

  - The skills involved includes SV/UVM/UVM_RAL/Randomization/Coverage/SVA.

  Preferred Qualifications

  - Experience in writing Test Plans independently

  - Experience in writing/updating Verification Testbench

  -Experience with debugging RTL & Gate level simulations

  -Experience with Functional Coverage &Code Coverage

  -Experience with Scripting in perl, python, tcl

  -Experience in planning Verification architecture, review testbench/ testplans with juniors, identify coverage gaps, propose alternate methods for coverage

  - Should have been involved in leading a chip DV effort

  -  Should have been self-driven and quick learner

  - Experience with Power aware(UPF) verification and debugs is plus

  - Silicon Debug Experience a plus.

  - Experience with Mixed Signal Designs involving DSP a plus

  - Modeling Experience with Matlab, Octave a plus

  Minimum Qualifications

  Required: Bachelor's, Electronics or EE

  Preferred: Master's, VLSI, Electronics or EE.

  1 to 3 years ASIC design, verification, or related work experience

• Job Families for Job Profiles

  Hardware Engineering

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