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R&D Engineering, Engineer

Teknik, data och digitalt · Mjukvaru- och webbutveckling · Mjukvaruutveckling · Backend

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Synopsys is seeking a passionate R&D Engineering, Engineer in Hsinchu, Taiwan to develop and optimize software for chip design and verification. This role involves designing scalable backend solutions, applying advanced algorithms, and collaborating with global teams to advance semiconductor technology.

Ansvarsområden

  • Develop and optimize multi-FPGA partitioning algorithms for the ZeBu emulation compile flow.
  • Build timing-aware partitioning solutions incorporating critical path timing criticality.
  • Account for ZeBu clocking constraints when evaluating partition quality and feasibility.
  • Design and enhance a more robust partitioning engine to reduce sensitivity to random initial solutions.
  • Apply analytical partitioning approaches to improve initial solution quality, stability, and reproducibility.
  • Work on constraint-aware partitioning for logic/memory resources, inter-FPGA connectivity, and timing-related partition constraints.
  • Collaborate with FPGA P&R and runtime teams to validate partitioning decisions.
  • Analyze partitioning bottlenecks and implement scalable, maintainable C/C++ backend components on Linux.

Krav

  • Bachelor’s or master’s degree in computer science, Electrical Engineering, or a related field.
  • Strong foundation in algorithms, data structures, and graph/hypergraph partitioning.
  • Experience with C/C++ and performance-oriented software development on Linux/Unix.
  • Experience with script languages like Python, Tcl.
  • Knowledge of optimization techniques and partitioning algorithms (e.g., hMetis, multi-way partitioning, heuristic and analytical methods).
  • Understanding of timing-aware optimization or willingness to develop expertise in timing-critical partitioning.
  • Strong problem-solving, debugging, and experimental evaluation skills.

Önskade kvalifikationer

  • Preferred: Basic exposure to clock synthesis or multi-cycle path concepts.
  • Preferred: Background in analytical approaches to partitioning or large-scale optimization.
  • Analytical and detail-oriented.
  • Passionate about algorithm design and performance optimization.
  • Self-motivated and able to work independently.
  • Strong team player with good communication skills.
  • Eager to learn and adapt to new technologies.

Förmåner

  • Competitive salaries.
  • Comprehensive medical and healthcare plans.
  • ETO and FTO Programs for time away.
  • Maternity and paternity leave, parenting resources, adoption and surrogacy assistance.
  • ESPP purchase of Synopsys common stock at a 15% discount.
  • Retirement Plans.
  • Talented and passionate colleagues.
  • Opportunities to make a difference.
#engineering#software development#algorithms#backend#EDA#chip design
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Företag

Synopsys Inc

Publicerade jobb

för 5 dagar sedan

Anställningstyp

Heltid

Arbetsform

På plats

Erfarenhetsnivå

Junior

Platser

Hsinchu, Taiwan

Kvalifikation

Kandidatexamen, Masterexamen

Sökande

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