R&D Engineering, Principal Engineer
Teknik, data och digitalt · Mjukvaru- och webbutveckling · Mjukvaruutveckling
I korthet
Ansvarsområden
- Own timing signoff methodology for standard cell libraries across TSMC N3, N2, N5, N7, and derivative nodes, defining setup, hold, recovery, removal, pulse-width, and noise margins.
- Develop and validate multi-corner, multi-mode signoff flows for low-VDD, high-performance, and AI/compute SoCs, accounting for AOCV, POCV, SOCV, aging effects, and dynamic voltage drop.
- Drive correlation analysis between Liberty models, PrimeTime STA results, HSPICE simulations, and silicon measurements.
- Debug critical customer-reported timing issues and define corrective actions.
- Build automation infrastructure in Python and Tcl to scale signoff validation and methodology deployment.
- Collaborate with characterization, CAD, modeling, EDA vendors, and foundry partners to influence signoff methodology direction.
- Create technical documentation, best-practice guidelines, and deployment recommendations.
Krav
- 15+ years of semiconductor industry experience with significant depth in timing signoff, static timing analysis, and standard cell library development.
- Recognized expertise in STA and signoff methodologies for advanced process nodes, ideally including direct experience with TSMC N7, N5, N3, or equivalent.
- Deep hands-on proficiency with Synopsys PrimeTime, PrimeTime-SI, SiliconSmart or Liberate, HSPICE, Spectre, and FineSim.
- Strong understanding of Liberty modeling, LVF, AOCV, POCV, SOCV, statistical timing, and variation-aware signoff techniques.
- Proven track record defining and deploying signoff methodologies that have been adopted across multiple products, customers, or business units.
- Expert-level automation skills in Python and Tcl, with experience building scalable signoff and QA infrastructure in Linux environments.
- Experience correlating STA results, SPICE simulations, parasitic extraction, and silicon measurements.
Önskade kvalifikationer
- You can look at a timing report with a 10ps violation and know within two questions whether it is a characterization issue, a parasitic problem, or a signoff methodology gap.
- You have led root-cause investigations that spanned characterization, customer designs, foundry PDKs, and EDA tool behavior.
- You are comfortable presenting signoff methodology recommendations to senior management, strategic customers, and foundry partners, and you can back up your position with data.
- You push back when a characterization corner looks wrong or a signoff criterion does not match what you are seeing in silicon.
- You have mentored engineers through complex timing correlation problems.
- You treat customer escalations as learning opportunities, not interruptions, and you use them to make the next library release better.
Förmåner
- Comprehensive medical and healthcare plans.
- ETO and FTO Programs (Time Away).
- Maternity and paternity leave, parenting resources, adoption and surrogacy assistance.
- ESPP (Purchase Synopsys common stock at a 15% discount, with a 24 month look-back).
- Retirement Plans.
- Competitive salaries.
- Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.
Färdigheter
Smart, Secure Everything—From Silicon to Software Synopsys technology is at the heart of innovations that are changing the way we live and work. The Internet of Things. Autonomous cars. Wearables. Smart medical devices. Secure financial services. Machine learning and computer vision. These breakthroughs are ushering in the era of Smart, Secure Everything―where devices are getting smarter, everything’s connected, and everything must be secure. Powering this new era of technology are advanced silicon chips, which are made even smarter by the remarkable software that drives them. Synopsys is at…
Företag
Synopsys IncPublicerade jobb
för 3 dagar sedan
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Bengaluru, India
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