Principal SI/PI Engineer - 18231
Teknik, data och digitalt · Mjukvaru- och webbutveckling · Mjukvaruutveckling · Inbyggda system
I korthet
Synopsys is looking for a Principal SI/PI Engineer to lead end-to-end signal and power integrity analysis for high-speed interfaces such as PCI Express, CXL, and other SerDes. The role involves channel modeling, simulation, lab correlation, and providing technical leadership to ensure the reliability and performance of semiconductor solutions.
Ansvarsområden
- Lead end-to-end SIPI for high-speed interfaces including PCI Express (Gen6/7/8), E224G, E448G, CXL (over PCIe), and other SerDes interfaces, spanning on-die, interposer, package, PCB, connectors, and compliance fixtures.
- Drive channel modeling and correlation across time- and frequency-domain analysis: S-parameters, TDR, crosstalk, ICN/ccICN, ERL/dERL, jitter/noise budgeting, equalization tradeoffs (TX/RX FFE/DFE/CTLE), eye margin simulation, and link margining.
- Own and execute SI signoff methodology for SerDes channels, including test chip package/board SIPI model extraction/model quality checks, de-embedding, and ensuring models are bandwidth-appropriate for target data rates.
- Partner with circuit/PHY, interposer/package, board, and product teams to diagnose bring-up and lab issues; propose design fixes and quantify risk/benefit via simulation and measurement.
- Plan and run correlation experiments (bench characterization, compliance testing support, fixture design guidance) and document learnings as reusable design guidelines.
- Define, improve, and document SIPI flows, requirements, and checklists for internal teams and (where applicable) customers; mentor engineers and lead technical reviews.
- Provide technical leadership across programs: set priorities, identify cross-project reuse opportunities, and influence architecture choices impacting signal integrity and power integrity.
Krav
- B.S. (M.S./Ph.D. preferred) in Electrical/Electronic Engineering or related field.
- 12+ years of relevant experience in high-speed SI/PI for SerDes links (silicon + package + board), preferably in interface IP or high-volume product development.
- Strong fundamentals in EM, transmission lines, passive/active modeling, and statistical link analysis; comfortable translating system requirements into measurable/signoff criteria.
- Expertise with high-speed link concepts: insertion/return loss, impedance control, mode conversion, NEXT/FEXT, jitter/noise sources, equalization, BER, etc.
- Deep expertise with modeling, simulation and EM tools (HSPICE, Keysight ADS/SystemVue, Ansys HFSS/SIwave/AEDT, Cadence Sigrity, Mathworks SIMULINK) and model formats (Touchstone, IBIS-AMI, SPICE, EM-based RLGC).
- Experience with lab correlation and measurement techniques (TDR, VNA, eye/jitter measurements, de-embedding/fixture calibration) and working alongside validation/compliance teams.
- Proficiency in scripting/automation for flow enablement (Python preferred; MATLAB/TCL is a plus) and a disciplined approach to documentation and reproducibility.
- Demonstrated technical leadership: mentoring, design reviews, influencing cross-functional decisions, and communicating complex topics clearly to mixed audiences.
Önskade kvalifikationer
- Highly skilled and passionate engineer with a deep understanding of high-speed signal and power integrity, particularly in the realm of SerDes interfaces.
- Proven track record in end-to-end SIPI for advanced links such as PCI Express (Gen6/7/8), E224G, E448G, and CXL (over PCIe).
- Strong foundation in electromagnetic theory, transmission lines, and advanced modeling.
- Adept at translating system requirements into actionable, measurable signoff criteria.
- Comfortable with channel modeling, frequency and time domain analysis, and using state-of-the-art simulation and measurement tools.
- Hands-on experience in bench characterization, compliance testing, and fixture design.
- Striving for rigorous correlation between simulation and hardware.
- Technical leader who mentors others, drives technical reviews, and is committed to sharing knowledge and standardizing best practices.
- Disciplined approach to documentation and reproducibility.
- Proactive, detail-oriented, and thrives in dynamic environments, always seeking opportunities to optimize flows, influence architectural decisions, and deliver reliable, high-performance solutions.
- Excellent communication skills to convey complex topics clearly to both technical and non-technical audiences.
- Analytical and detail-oriented, with a passion for tackling complex engineering challenges.
- Collaborative and communicative, able to work effectively across multi-disciplinary teams.
- Proactive and resourceful, constantly seeking opportunities to optimize processes and drive innovation.
- Mentor and leader, committed to sharing knowledge and empowering others.
- Disciplined and organized, with a strong focus on documentation, reproducibility, and best practices.
- Adaptable, able to thrive in fast-paced, dynamic environments.
Förmåner
- Comprehensive medical and healthcare plans
- ETO and FTO Programs
- Maternity and paternity leave, parenting resources, adoption and surrogacy assistance
- ESPP (Purchase Synopsys common stock at a 15% discount, with a 24 month look-back)
- Retirement plans
- Competitive salaries
- Eligible for an annual bonus, equity, and other discretionary bonuses
- Comprehensive health, wellness, and financial benefits as part of a competitive total rewards package
#engineering#semiconductor#hardware#signal integrity#power integrity#serdes#high-speed interfaces
Företag
Synopsys Inc
Publicerade jobb
för 1 månad sedan
Anställningstyp
Heltid
Arbetsform
På plats
Erfarenhetsnivå
Senior
Platser
Boxborough, United States
Austin, United States
Hillsboro, United States
Bay Area, United States
Kvalifikation
Kandidatexamen, Masterexamen, Doktorand
Sökande
Ansök tidigt