Principal Engineer – IP Office

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I korthet

Microsoft's AI SoC Silicon team seeks a Principal Engineer – IP Office to drive the selection, QA, and integration of best-in-class IPs for AI components. This role involves technical leadership, collaboration with internal teams and external vendors, and ensuring smooth integration of IPs into SoCs for various Microsoft products.

Ansvarsområden

Establish as an integral member of AI SoC design team for AI component development.
Focus on best-in-class IP selection, QA, and smooth integration in SoCs.
Identify new value-adding, best-in-class IPs (PLL, DTS, Droop-Detector, HBM4, 224G Ethernet, GPIOs, etc.).
Facilitate selection of most suitable IPs for targeted SoC landing-zones.
Architect robust process for IP release, update, QA, integration, and pre/post silicon validations.
Track release and updates of IPs and ensure appropriate integration.
Review IP integrations, signal and power integrity, package and board designs with experts and IP vendors.
Ensure quality of incoming IPs and facilitate smooth integrations with Logic Design and Physical Design teams.
Interface with architecture, physical design (PD), design for test (DFT), and other teams to optimize tradeoffs.
Provide technical leadership through mentorship and teamwork.

Krav

Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years technical engineering experience OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 6+ years technical engineering experience OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 8+ years technical engineering experience OR equivalent experience.
Ability to meet Microsoft, customer and/or government security screening requirements.
Must pass Microsoft Cloud Background Check upon hire/transfer and every two years thereafter.
Must be eligible to access export-controlled information; requires verification of citizenship or residency status.

Önskade kvalifikationer

10+ years of experience in interaction with major IP suppliers, IP selection, QA and Release process.
Experience in integration of IPs in major CPU, GPU or AI accelerator SoCs and close interactions with Major IP vendors and suppliers of SoCs.
6+ years Design experience either in IP development or in SoC level Integration of SRAM design, Register Files and Memory Compilers, High Speed serial and/or Parallel IOs, or Sub-system and SoC integration.
5+ years of experience as a leader of IP office functions of a major CPU, GPU or AI SoC.
Established reputation in interactions with leading suppliers of IPs in 112G/224G class Ethernet, PCIe 5/6, HBM3/4.
Track record of successful tape outs in deep sub-micron technologies.
Scripting language such as Python or Perl.
Knowledge of Front-end and back-end IP Integration flows in a SoC.
Strong communication skills, self-motivation, and ability to collaborate with architecture, Front-end, Physical design and post-silicon teams in Microsoft.

Förmåner

The typical base pay range across the U.S. is USD $142,800 - $274,800 per year.
In San Francisco Bay area and New York City metro area, the base pay range is USD $188,000 - $304,200 per year.
Certain roles may be eligible for benefits and other compensation.

Färdigheter

PythonPerl

#AI SoC#Silicon Engineering#Hardware Engineering#IP selection#IP integration#HBM4#Ethernet#GPIOs#PLL#DTS#Droop-Detector#CPU#GPU#AI accelerator

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