The Job

Physical Design Engineer

Teknik, data och digitalt · Mjukvaru- och webbutveckling · Mjukvaruutveckling

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I korthet

Qualcomm is looking for a Physical Design Engineer to own PNR implementation and signoff on latest technology nodes for their SoCs. The role requires good hands-on experience with PNR flows and signoff domains, along with strong Unix/Linux and scripting skills.

Ansvarsområden

  • Complete ownership on PNR implementation (Floorplanning, Placement, CTS, post_route, etc.) on latest nodes.
  • Definition, modeling, design (digital and/or analog), optimization, verification, validation, implementation, and documentation of IP (block/SoC) development.
  • Collaboration with cross-functional groups to determine product execution path.

Krav

  • Bachelor's degree in Science, Engineering, or related field.
  • 2+ years Hardware Engineering experience or related work experience.
  • 2+ years' experience with PNR flow in latest tech nodes (e.g., 4nm/5nm/7nm/10nm).
  • Good hands-on experience on Floorplanning, PNR and STA flows.
  • Good knowledge on Placement/Clock Tree Synthesis (CTS), optimization, etc.
  • Good understanding on signoff domains – LEC/CLP/PDN knowledge, etc.
  • Good knowledge on Unix/Linux – Perl/TCL fundamentals/scripting.
  • Signoff knowledge is mandatory (STA, Power analysis, FV, low power verification, PV, etc.).
  • Quick learner with good analytical and problem-solving skills.
#ASIC Engineering#PNR implementation#Floorplanning#STA flows#Placement#Clock Tree Synthesis (CTS)#signoff domains#LEC/CLP/PDN#Unix/Linux#Perl/TCL scripting#latest nodes
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Företag

Qualcomm

Publicerade jobb

för 23 timmar sedan

Anställningstyp

Heltid

Arbetsform

På plats

Erfarenhetsnivå

Mellannivå

Platser

Noida, India

Kvalifikation

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