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NOC DV Sr Engineer

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I korthet

Qualcomm is looking for a Senior Engineer, NOC DV, based in Bangalore, India, to be responsible for the verification of next-generation Infrastructure IPs (DDRSS, Memory Controllers) for System-on-chip (SoC). The role involves planning and implementing IP/Cluster/Formal verification flows and coordinating with cross-functional teams.

Ansvarsområden

  • Ownership of DV test bench and associated collaterals (Checkers, Trackers, Scoreboards, Assertion, Functional Coverage).
  • Develop test plan and test cases to cover design feature set and follow up with stakeholders on code coverage and functional coverage closure.
  • Work closely with System Architects, Design, and emulation teams on failure debugs and coverage closure.
  • Debug regression signatures and identify bug fixes.
  • Responsible for Quality sign off and required documentation.
  • Developing/Deploying scripts/tools for validation (Certitude, VC Formal, VPlan).
  • Debug and root cause post silicon issues in collaboration with Design, SW, and test teams.
  • Work with SoC level performance modeling team on latency and bandwidth analysis.

Krav

  • Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience.
  • Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.
  • PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience.
  • Strong debugging, Analytical and problem-solving skills.
  • Expertise on UVM based verification.
  • Knowledgeable about ARM bus protocols, Virtual Memory concepts, SoC system architecture.
  • Experience in developing Monitors, Scoreboards, Sequencers that utilize scripts, System Verilog, UVM, and methodologies to increase the rate with which bugs are found and resolved.
  • Communication and collaboration skills to work with a large world-wide design organization.
  • 8 Years of Experience in IP verification or related.
  • Experience with UVM and ARM Bus protocols.

Önskade kvalifikationer

  • Experience in designs optimized for low power - Dynamic clock gating, Logic/ Memory power collapse.
  • Experience in verifying designs meeting Automotive Safety Integrity Levels (ASIL).
  • Proficiency in Scripting languages (Python or Perl) for Automation initiatives, C/C++/SystemC for performance models.
  • Post-si bring-up and HW-SW debug experience would be a plus.
  • Knowledge & exposure to silicon debug tool chains would be an added advantage.

Förmåner

  • Qualcomm is an equal opportunity employer.
  • Qualcomm is committed to providing an accessible process for individuals with disabilities.
  • Qualcomm is committed to making our workplace accessible for individuals with disabilities.
  • Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information.
#NOC#DV#Sr Engineer#Hardware Engineering#IP verification#System-on-chip#SoC#test bench#test plan#test cases#code coverage#functional coverage#regression#post silicon#debug#scripts#automation#performance modeling#UVM#ARM bus protocols#Virtual Memory#SoC system architecture#Monitors#Scoreboards#Sequencers#System Verilog#low power#ASIL#Python#Perl#C++#SystemC
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Företag

Qualcomm

Publicerade jobb

för 2 veckor sedan

Anställningstyp

Heltid

Arbetsform

På plats

Erfarenhetsnivå

Senior

Platser

Bangalore, India

Kvalifikation

Kandidatexamen, Masterexamen, Doktorand

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